Application of basecase results to initiate iterations and test for convergence in a hybride computer arrangement used to generate rapid electric power system loadflow solutions
First Claim
1. A hybrid loadflow computer arrangement comprising a DC analog simulator of an AC network, said simulator including a plurality of bus DC circuits and line DC circuits interconnected to correspond to the AC network, a programmed digital computer including means for generating bus generation and load current values as a function of predetermined parameters including stored bus power and voltage data, an analog output system, said digital computer Further including means for causing said output system to generate phasor current signals representative of the digital computer determined bus generation and load current values, means for applying the phasor bus generation and load current signals to the corresponding bus DC circuits, each of said bus DC circuits including means for responding to line phasor current and bus generation and load phasor input current signals and for generating an output bus voltage phasor signal, each of said line DC circuits including means for responding to the difference between applied bus voltage phasor signals and generating an output line phasor current signal in accordance at least with a representation of the equivalent series branch line impedance, said digital computer further including means for generating representations of bus voltage phasor signals after the generation and load phasor current signals are applied to said DC bus circuits, means for generating bus generation and load current values in successive iterations after a startup iteration as a function of bus voltage values determined in the next preceding iteration, means for converging the iterative process to a solution, means for generating specified voltages for the network busses including acquired on-line voltage values for at least some of the busses, means for comparing at least some of the respective computed bus voltage signal representations with the respective specified bus voltages, and means for terminating the iterations and producing a loadflow solution when the bus voltage differences conform to a predetermined standard.
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Abstract
A hybrid loadflow computer arrangement includes an analog network simulator and a digital computer which acquires and processes on-line data and operator data related to the power system for which a loadflow problem is being solved. The analog simulator includes modular circuits representative of power system busses and lines and the interface between the digital computer and the analog network simulator is provided by analogto-digital and digital-to-analog converters and by line outage contact closure outputs. The hybrid arrangement operates iteratively, with the analog network simulator providing a bus voltage solution for a set of network simultaneous equations and the digital computer providing bus load and generation injection current calculations and convergence steering control. Iterations are started with bus voltage values derived from a next earlier basecase loadflow solution. After the first and subsequent iterations, convergence is tested by the differences between specified bus voltages and the analog solution bus voltages.
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Citations
16 Claims
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1. A hybrid loadflow computer arrangement comprising a DC analog simulator of an AC network, said simulator including a plurality of bus DC circuits and line DC circuits interconnected to correspond to the AC network, a programmed digital computer including means for generating bus generation and load current values as a function of predetermined parameters including stored bus power and voltage data, an analog output system, said digital computer Further including means for causing said output system to generate phasor current signals representative of the digital computer determined bus generation and load current values, means for applying the phasor bus generation and load current signals to the corresponding bus DC circuits, each of said bus DC circuits including means for responding to line phasor current and bus generation and load phasor input current signals and for generating an output bus voltage phasor signal, each of said line DC circuits including means for responding to the difference between applied bus voltage phasor signals and generating an output line phasor current signal in accordance at least with a representation of the equivalent series branch line impedance, said digital computer further including means for generating representations of bus voltage phasor signals after the generation and load phasor current signals are applied to said DC bus circuits, means for generating bus generation and load current values in successive iterations after a startup iteration as a function of bus voltage values determined in the next preceding iteration, means for converging the iterative process to a solution, means for generating specified voltages for the network busses including acquired on-line voltage values for at least some of the busses, means for comparing at least some of the respective computed bus voltage signal representations with the respective specified bus voltages, and means for terminating the iterations and producing a loadflow solution when the bus voltage differences conform to a predetermined standard.
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2. A hybrid loadflow computer arrangement as set forth in claim 1 wherein the solution is produced when all of the compared bus voltage differences are less than a predetermined error quantity.
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3. A hybrid loadflow computer arrangement as set forth in claim 2 wherein said digital computer further includes means for storing the solution bus voltage signal representations when the loadflow solution is determined to have been produced.
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4. A hybrid loadflow computer arrangement as set forth in claim 1 wherein said digital computer further includes means for providing no solution if the number of iterations reaches a maximum limit without the required standard on bus voltage differences being met.
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5. A hybrid loadflow computer arrangement as set forth in claim 1 wherein said digital computer further includes means for generating operator specified voltages for at least some of the network busses.
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6. A hybrid loadflow computer arrangement as set forth in claim 5 wherein said digital computer further includes means for generating bus voltage values which are operator specified as replacements for on-line bus voltage balues otherwise applicable.
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7. A hybrid loadflow computer arrangement as set forth in claim 1 wherein the voltage comparisons are made only for voltage regulated busses.
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8. A hybrid loadflow computer arrangement comprising a DC analog simulator of an AC network, said simulator including a plurality of bus DC circuits and line DC circuits interconnected to correspond to the AC network, a programmed digital computer including means for generating bus generation and load current values as a function of predetermined parameters including stored bus power and voltage data, an analog output system, said computer further including means for causing said output system to generate phasor current signals representative of the digital computer determined bus generation and load current values, means for applying the phasor bus generation and load current signals to the corresponding bus DC circuits, each of said bus DC circuits including means for responding to line phasor current and bus generation and load phasor input current signals and for generating an output bus voltage phasor signal, each of said line DC circuits including means for responding to the difference between applied bus voltage phasor signals and generating an output line phasor currenT signal in accordance at least with a representation of the equivalent series branch line impedance, said computer further including means for generating representations of bus voltage phasor signals after the generation and load phasor current signals are applied to said DC bus circuits, means for generating bus generation and load current values in successive iterations after a startup iterations as a function of bus voltage values determined in the next preceding iteration, means for converging the iterative process to a solution and for sensing when a solution is reached, means for generating voltage regulated bus reactive power values as a function of the computed bus voltage signal representations, and means for setting the last on-line solution values of the bus voltage signal representations and the voltage regulated bus reactive power values as the corresponding initial values in the first iteration of a new on-line solution.
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9. A hybrid loadflow computer arrangement as set forth in claim 8 wherein said computer further includes means for retaining voltage regulated bus reactive power within limits as the solution is converged.
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10. A hybrid loadflow computer arrangement comprising a DC analog simulator of an AC network, said simulator including a plurality of bus DC circuits and line DC circuits interconnected to correspond to the AC network, a programmed digital computer including means for generating bus generation and load current values as a function of predetermined parameters including stored bus power and voltage data, an analog output system, said computer further including means for causing said output system to generate phasor current signals representative of the digital computer determined bus generation and load currents, means for applying the phasor bus generation and load current signals to the corresponding bus DC circuits, each of said bus DC circuits including means for responding to line phasor current and bus generation and load phasor input current signals and for generating an output bus voltage phasor signal, each of said line DC circuits including means for responding to the difference between applied bus voltage phasor signals and generating an output line phasor current signal in accordance at least with a representation of the equivalent series branch line impedance, said computer further including means for generating representations of bus voltage phasor signals after the generation and load phasor current signals are applied to said DC bus circuits, means for generating bus generation and load currents in successive iterations after a startup iteration as a function of bus voltage values determined in the next preceding iteration, means for converging the iterative process to a solution and for sensing when a solution is reached, means for generating voltage regulated bus reactive power values as a function of the computed bus voltage signal representations, and means for setting the last on-line solution values of the bus voltage signal representations as the initial bus voltage values in the first iteration of a new on-line solution.
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11. A hybrid loadflow computer arrangement as set forth in claim 10 wherein said computer further includes means for generating specified voltages for the network busses including acquired on-line voltage values for at least some of the busses, means for comparing at least some of the respective computed bus voltage signal representations with the respective specified bus voltages, and means for terminating the iterations and produce a loadflow solution when the bus voltage differences conform to a predetermined standard.
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12. A hybrid loadflow computer arrangement as set forth in claim 11 wherein said computer further includes means for storing the solution bus voltage signal representations and voltage regulated bus reactive power values when the loadflow solution is determined to have been reached.
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13. A hybrid loadflow computer arrangement as set forth in claim 11 Wherein the voltage comparisons are made only for voltage regulated busses.
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14. An automated method for making on-line load-flow solutions for an electric power system, the steps of said method comprising sensing representations of at least some on-line values including at least some on-line unit generation power and bus voltage values for the system, storing said on-line values in a programmed digital computer, operating the digital computer to determine bus generation and load current values as a function of stored bus power and voltage data, applying phasor signals corresponding to the bus generation and load currents to an analog network simulator which includes DC bus circuits and DC line circuits interconnected to simulate the power system, operating the analog simulator to cause the bus circuits to generate solution bus voltage phasor signals, and operating the digital computer to generate new bus generation and load current values as a function of the stored data and the solution bus voltage phasor signals, operating said digital computer to generate specified voltages for the network busses including acquired on-line voltage values for at least some of the busses, operating said digital computer to compare at least some of the respective computed bus voltage signal representations with the respective specified bus voltages, and operating said digital computer to terminate the iterations and produce a loadflow solution when the bus voltage differences conform to be a predetermined standard.
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15. A method as set forth in claim 14 wherein the method steps further comprise operating said digital computer to generate voltage regulated bus reactive power values as a function of the computed bus voltage signal representations, and operating said digital computer to set the last on-line solution values of the bus voltage signal representations and the voltage regulated bus reactive powers as the corresponding initial values in the first iteration of a new on-line solution.
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16. An automated method for making on-line loadflow solutions for an electric power system, the steps of said method comprising sensing representations of at least some on-line values including at least some on-line unit generation power and bus voltage values for the system, storing said on-line values in a programmed ditital computer, operating the digital computer to generate bus generation and load current values as a function of stored bus power and voltage data, applying phasor signals corresponding to the bus generation and load currents to an analog network simulator which includes DC bus circuits and DC line circuits interconnected to simulate the power system, operating the analog simulator to cause the bus circuits to generate solution bus voltage phasor signals, and operating the digital computer to generate new bus generation and load current values as a function of the stored data and the solution bus voltage phasor signals, operating said digital computer to generate voltage regulated bus reactive power values as a function of the computed bus voltage signal representations, and operating said digital computer to set the last on-line solution values of the bus voltage signal representations and the voltage regulated bus reactive powers as the corresponding initial values in the first iteration of a new on-line solution.
Specification