Quadratic phase memory

• US 3,898,446 A
• Filed: 09/06/1974
• Issued: 08/05/1975
• Est. Priority Date: 09/06/1974
• Status: Expired due to Term

• Current Assignee: Bernard W. Vatz
• Original Assignee: Bernard W. Vatz
• Inventors: Vatz, Bernard W.
• Primary Examiner(s): Dildine, Jr., R. Stephen
• Application Number:
  US05/503,834
• Time in Patent Office: 333 Days
• Field of Search: 235/156,186 444/1
• US Class Current: 708/441
• CPC Class Codes: G06F 1/0356 by using two or more smaller tables, e.g. addressed by parts of the argument
• CPC Class Codes: G06F 17/142 Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
• CPC Class Codes: G06F 2101/04 Trigonometric functions

Abstract

Twiddle factors are generated by a memory unit which is divided into two symmetrical sections; each section contains the magnitude words for one half of a quadrant. After the memories are addressed and read, the twiddle factor is assigned to either the sine or cosine by a pair of switching means, and then the proper sign is attached by a pair of sign generators. A clock circuit is provided to address the memory units and select the states of the switching networks and sign generators.

Claims

1. A system for producing sine and cosine values of a rotating vector comprising memory means containing magnitude values for a rotating vector stepped in discrete steps over a 90* range;

selector means connected to said memory means whereby said magnitude values will be presented at outputs of the memory means in the proper step sequence of the rotating vector;

sign generating means connected to the outputs of said memory means so as to provide the magnitude values with a proper sign in accordance with the quadrant in which the rotating vector is located;

outputs of said selector means being so related to the rotating vector as to provide signals indicating the quadrant said rotating vector is in;

outputs of said selector meanS being connected to said sign generating means so as to control the sign said sign generating means will apply to the magnitude values;

said memory means is divided into first and second sections;

said first section containing the magnitude values stepped in discrete steps of the sine of the angles from 0* to 45*;

said second section containing the magnitude values of the sine of 90* to 45* in discrete steps;

first and second outputs of said first and second sections;

said selector means being connected to the first and second sections of said memory means so as to cause the first section to read out the magnitude values at its output sequentially from 0* to 45*, and said second section to read the magnitude values sequentially from 90* to 45* at its output whereby one section presents the sine magnitude value and the other section presents the cosine magnitude value;

said sign generating means comprising first and second sign generating means each having an input and an output;

switching means connected between the outputs of the first and second sections of the memory means and the inputs of said first and second sign generating means so as to connect the output of the section having the sine magnitude value to the first signal generating means input and to connect the output of the section having the cosine magnitude value to the input of the second signal generating means; and

said selector means being connected to said switching means so as to control the operation thereof in accordance to which half of a particular quadrant the rotating vector is located.

2. A system as set forth in claim 1 wherein said selector means is a clock means having first and second parts;

said first part causing said first section of said memory means to cyclically provide at its output the magnitude values of the sine of the rotating vector rotating from 0* to 45* and then backwards from 45* to 0*, and said second section to cyclically provide at its output the magnitude value of the sine of a rotating vector rotated from 90* to 45* and then from 45* to 90*;

said second part of the clock means being a counter which counts half cycles of said first part;

said second part of said clock means being connected to said switching means so as to cause the switching means to reverse connections each 45* of rotation of said rotating vector; and

said second part also being connected to said first and second sign generating means so as to cause said sign generating means to apply the proper sign in accordance to the quadrant said rotating vecotr is located.

3. A system as set forth in claim 2 wherein said clock means is a digital clock divided into first and second parts;

said first part being an up/down counter which counts up while the rotating vector is moving in the first 45* of a quadrant and counts down while the rotating vector is moving in the last 45* of a quadrant;

said second part being a 3-bit digital counter wherein bit 1 is the most significant bit, bit 3 is the least significant bit and bit 2 is the middle significant bit;

said second part counting once each time said first part reverses its count direction;

an output from bit 3 is connected to the switching means to as to control same;

an output of bit 1 being connected to said first sign generating means for controlling its operation; and

outputs from bits 1 and 2 being connected to said second sign generating means for control of its operation.

4. A system for producing sine and cosine magnitude values for a rotating vector comprising memory means divided into first and second sections;

said first section containing the magnitude values stepped in discrete steps of the sine of the angles from 0* to 45*;

said second section containing the magnitude values of the sine of 90* to 45* in discRete steps;

first and second outputs of said first and second sections; and

selector means connected to the first and second sections of said memory means so as to cause the first section to read out the magnitude values at its output sequentially from 0* to 45*, and said second section to read the magnitude values sequentially from 90* to 45* at its output whereby one section presents the sine magnitude value and the other section presents the cosine magnitude value.

5. A system as set forth in claim 4 further comprising first and second output terminals;

switching means connected between the outputs of the first and second sections of the memory means and said first and second output terminals so as to connect the output of the section having the sine magnitude value to the first output terminal and to connect the output of the section having the cosine magnitude value to the input of the second output terminal; and

said selector means being connected to said switching means so as to control the operation thereof in accordance to which half of a particular quadrant the rotating vector is located whereby the sine magnitude values of the rotating vector always appears at the first output terminal and the cosine magnitude values always appear at the second output terminal.

6. A system as set forth in claim 5 wherein said selector means is a clock means having first and second parts;

said first part causing said first section of said memory means to cyclically provide at its output the magnitude values of the sine of the rotating vector rotating from 0* to 45* and then backwards from 45* to 0*, and said second section to cyclically provide at its output the magnitude value of the sine of a rotating vector rotated from 90* to 45* and then from 45* to 90*;

said second part of the clock means being a counter which counts half cycles of said first part; and

said second part of said clock means being connected to said switching means so as to cause the switching means to reverse connections each 45* of rotation of said rotating vector.