Method and apparatus for identifying wires

• US 3,902,026 A
• Filed: 01/18/1974
• Issued: 08/26/1975
• Est. Priority Date: 01/18/1974
• Status: Expired due to Term

• Current Assignee: Barry N. Rogers, Robert E. Petrere, Sidney Rogers
• Original Assignee: Barry N. Rogers, Robert E. Petrere, Sidney Rogers
• Inventors: Rogers, Sidney, Rogers, Barry N., Petrere, Robert E.
• Primary Examiner(s): Robinson, Thomas A.
• Application Number:
  US05/434,390
• Time in Patent Office: 585 Days
• Field of Search: 179/175.3A,175.25,18FH 324/66,51,54,73,133
• US Class Current: 324/66
• CPC Class Codes: G01R 31/60 Identification of wires in a multicore cable
• CPC Class Codes: H01R 43/28 for wire processing before connecting to contact members, not provided for in groups H01R43/02 - H01R43/26

Abstract

Improved method and apparatus for identifying individual wires of a plurality of wires extending between first and second spaced locations. A plurality of the wires at the first location are connected to individual addressable locations in a matrix. At the second location, signals indicative of individual wire identifications are sequentially applied to the wires with a portable coder and the wires are labeled with their assigned identifications. For each wire to which a signal is applied and having a connection to the matrix, manifestations of the assigned wire identification and of the matrix address for such wire are stored in a memory. The memory is then scanned for identifying the wires at the first location and the wires are labeled.

Claims

1. A method for identifying individual wires of a plurality of wires extending between first and second locations comprising the steps of:

connecting a plurality of said wires at said first location to individual addressable locations in a matrix;

sequentially applying to at least some wires at said second location different signals indicative of a predetermined identification for each such wire;

for each wire to which a signal is applied at said second location and having a connection to said matrix, storing in a memory connected to said matrix manifestations of the wire identification and of the matrix address of such wire; and

identifying wires connected to said matrix at said first location from such stored manifestations.

2. A method for identifying individual wires of a plurality of wires, as set forth in claim 1, and including the step of labeling each wire at said second location to which a signal is applied with its predetermined identification.

3. A method for identifying individual wires of a plurality of wires, as set forth in claim 1, and further including the step of applying an acknowledgement signal to each wire connected to said matrix after manifestations of the matrix address and of the wire identification have been stored in said memory.

4. A method for identifying individual wires of a plurality of wires, as set forth in claim 3, and including the step of indicating at said second location when an identification signal is applied to a wire which is not connected to said matrix at said first location.

5. A method for identifying individual wires of a plurality of wires, as set forth in claim 3, and including the step of indicating at said second location when an identification signal is applied to a wire having an open circuit between said first and second locations.

6. A method for identifying individual wires of a plurality of wires, as set forth in claim 3, and including the step of indicating at said second location when an identification signal is applied to a wire which is short circuited to ground.

7. A method for identifying individual wires of a plurality of wires, as set forth in claim 1, and including the step of printing an identification label for each wire at said first location as each such wire is identified, and applying each printed identification label to such identified wire at said first location.

8. Apparatus for identifying individual wires of a plurality of wires extending between first and second locations comprising, in combination, a transmitter including means for generating a signal indicative of a predetermined identification for a wire and means for applying such signal to a wire to be so identified at said second location, a matrix having individual addressable locations, means for connecting a plurality of said wires at said first location to different ones of said addressable matrix locations, a memory, means connecting said memory to said matrix for storing in said memory manifestations of the matrix addresses of wires over which identification signals are received and manifestations of the received identification for each such wire, and means responsive to the address and identification manifestations stored in said memory for identifying wires at said first location connected to said matrix.

9. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, and including means at said first location for applying an acknowledgement signal on a wire connected to said matrix after manifestations of the matrix address and identification for such wire have been stored in said memory.

10. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 9, and including means at said second location responsive to such acknowledgement signal for indicating a successful transmission of a wire identification.

11. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, and including means at said second location for indicating when an identification signal is applied to a wire which is not connected to said matrix at said first location.

12. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, and including means at said second location for indicating when an identification signal is applied to a wire having an open circuit between said first and second locations.

13. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, and including means at said second location for indicating when an identification signal is applied to a wire which is short circuited to ground.

14. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, wherein said identifying means responsive to the stored manifestations includes means adjacent said matrix for identifying a single matrix location, and means for displaying the identification for a wire connected to said matrix at such location.

15. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 14, wherein said identifying means responsive to the stored manifestations further includes means for scanning said memory in a predetermined sequence, means for stopping said scanning means at the first manifestations of a wire identification located in said memory, means for applying such identification manifestations to said identification displaying means, and means for applying address manifestations for such wire to said matrix location identifying means for identifying the matrix location to which such wire is connected.

16. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 8, wherein said transmitter further includes means for generating at least one parity bit from said identification signal and means for applying such parity bit on such wire along with the identification signal, and wherein said means for connecting said matrix to said memory includes means responsive to such parity bit for detecting any error in the signal received on such wire.

17. Apparatus for identifying individual wires of a plurality of wires, as set forth in claim 16, wherein said means for connecting said matrix to said memory further includes means for storing such parity bit in said memory with the associated wire identification manifestations, and wherein said means for identifying wires at said first location includes means responsive to such stored parity bit for detecting any error in wire identification manifestations read from said memory.