Pattern recognition system

• US 3,902,160 A
• Filed: 12/28/1973
• Issued: 08/26/1975
• Est. Priority Date: 12/27/1971
• Status: Expired due to Term

• Current Assignee: Ryuichi Kawa
• Original Assignee: Ryuichi Kawa
• Inventors: Kawa, Ryuichi
• Primary Examiner(s): Boudreau, Leo H.
• Application Number:
  US05/429,181
• Time in Patent Office: 606 Days
• Field of Search: 340/146.3MA,146.3R,146.3AQ,146.3S 444/1
• US Class Current: 382/224
• CPC Class Codes: G06V 30/195 using a resistor matrix

Abstract

A two-dimensional input pattern to be recognized is converted into a pattern of n analog voltages representing the peculiar features of said pattern. Next there is established one-to-one correspondence between the two-dimensional input pattern and a point in an N-dimensional Euclidean Space whose coordinates correspond to said n analog voltages. The distances in said Euclidean between the two-dimensional input pattern space and standard patterns in storage for identification of a desired number of patterns are obtained based upon a relation in accord with the present invention. The two-dimensional input pattern is identified by the standard pattern whose distance to the twodimensional input pattern is the minimum such distance.

Claims

1. A pattern recognition system including means for converting an input pattern into corresponding electrical signals defining a point X in N-dimensional space, and comprising:

means for obtaining signals representing each of the distances DD(k) between said point X and each of a plurality of point Y(k) in the same space (where k 1,2, . . . ,K) by summing, for each point Y(k), the ratios between the absolute values of signals D(i) each representing the projection of said point X on the corresponding axis R(i) originating at the point Y(k) and corresponding signals q(i) each representing the standard deviation along the corresponding axis R(i) of the electrical signals corresponing to each of a plurality of patterns classified in the category of a single standard pattern (where i 1,2, . . . ,J), each single standard pattern corresponding to a different point Y(k); and

means for comparing the signals representing the distances DD(k) to find the least distance DD(k), said least distance indicating the correspondence between the input pattern and the standard pattern of the corresponding point Y(k).

2. A system as in claim 1 including means for comparing the difference between the least distance DD(k) and the next least distance DD(k) with a selected threshold signal and for providing a rejection signal if said difference is below the threshold, said rejection signal indicating that the input pattern can not be unambiguously associated with a single standard pattern.

3. A system as in claim 1 wherein each of the means for finding the signal representing the distance between the point X and a single point Y(k) in said N-dimensional space comprises:

an adder-subtractor for each of the J axis, each adder-subtractor comprising a resistance network and an operational amplifier, said resistance network receiving the electrical signals representing the input pattern and being connected to the input of the corresponding operational amplifier, the resistance network component values and the operational amplifier characteristic being selected to provide at the amplifier output the signal representing the projection D(i) on the corresponding axis R(i);

for each adder-subtractor, an output resistor connected to the output thereof and having a value corresponding to the corresponding standard deviation g(i); and

means for summing the absolute values of the electrical signals at said output resistors, the resulting sum representing the distance DD(k) between the point X and the single point Y(k).

4. A system as in claim 3 wherein the means for summing the electrical signals at said output resistors comprises:

a first and a second operational amplifier;

a first output line connected to the input of the first amplifier and a second output line connected to the output of the first amplifier through a selected resistor and to the input of the second amplifier;

a first set of diodes connecting the output resistors to the first output line and allowing current flow in the same single direction; and

a second set of diodes connecting each of said output resistors to the second output line and allowing current flow in the same single direction which is opposite the current flow direction for the first outPut line.

5. A pattern recognition system comprising a. an input unit adapted to read an input pattern to be identified so as to provide quantized video signals 1 representing black elementary areas and video signals 0 representing white elementary areas:

b. a memory adapted to store therein said video signals as input pattern information;

c. an input pattern component extracting unit adapted to convert said input pattern information into analog signals representing the peculiar features of said input pattern information;

d. circuit means adapted to establish one-to-one correspondence between said input pattern information and a point in Euclidean space whose coordinates correspond to said analog signals of said input pattern information, and further adapted to obtain the distance DD in said Euclidean space between said input pattern information and a predetermined number of standard patterns for identification of a predetermined number of different input patterns, based upon the following equation;

6. A pattern recognition system as defined in claim 5 wherein a. said circuit means for obtaining the distances between said input information pattern and said standard patterns in storage comprises, for each standard pattern, a plurality of J adder-subtractors, each of said adder-subtractors comprising diodes, resistors, an operational amplifier, and reference voltage supply means, each adder-subtractor adapted to obtain the projection of said input pattern information upon a corresponding one of said J axes in said space;

b. means connecting the output of each of said adder-subtractors to one terminal of each of two means adapted to permit the current to flow in one direction only, said two means allowing current flow in opposite directions, each terminal connected to the corresponding adder-subtractor through a common resistor whose value is in proportion to the reciprocal of the corresponding standard deviation g(i);

c. the other terminals of each of said two means adapted to permit the current to flow in one direction only being connected to a respective one of two common connection lines;

d. first output means which is connected to one of said two connection lines and is adapted to provide a positive polarity output voltage in proportion to the sum of the currents flowing into said one of said connection lines from said plurality of adder-subtractors; and

e. second output means which is connected to the other connection line and is adapted to provide a positive polarity output voltage in proportion to the sum of the currents flowing into said other connection line from said plurality of adder-subtractors, whereby the distance between said input pattern information and each of said standard patterns may be represented by the sum of said two positive polarity output voltages of said first and second output means of the circuit means correspOnding to each of the standard patterns.