High-speed transistor with rectifying contact connected between base and collector

• US 3,909,837 A
• Filed: 06/07/1971
• Issued: 09/30/1975
• Est. Priority Date: 12/31/1968
• Status: Expired due to Term

• Current Assignee: John William Kronlage
• Original Assignee: John William Kronlage
• Inventors: Kronlage, John William
• Primary Examiner(s): Edlow, Martin H.
• Application Number:
  US05/150,720
• Time in Patent Office: 1,576 Days
• Field of Search: 317/235UA,235Y,235D,235E
• US Class Current: 257/479
• CPC Class Codes: H01L 21/00 Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
• CPC Class Codes: H01L 23/48 Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
• CPC Class Codes: H01L 23/482 consisting of lead-in layers inseparably applied to the semiconductor body electrodes H01L29/40
• CPC Class Codes: H01L 27/00 Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate details thereof H01L23/00, H01L29/00 - H10K10/00; assemblies consisting of a plurality of individual solid state devices H01L25/00
• CPC Class Codes: H01L 27/0766 with Schottky diodes only
• CPC Class Codes: H01L 29/0821 Collector regions of bipolar transistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H03K 19/08 using semiconductor devices H03K19/173 takes precedence; wherein the semiconductor devices are only diode rectifiers H03K19/12
• CPC Class Codes: H03K 19/084 Diode-transistor logic

Abstract

High-speed logic switching is accomplished by an internal antisaturation clamp comprising a barrier-type rectifying junction between the base electrode and a collector electrode of a junction transistor. Diffusion and metalization techniques are used to fabricate a shallow-base transistor, having a high internal cutoff frequency, and a barrier-type rectifying junction surrounded by a guard ring. The rectifying junction covers a window in a diffusion region for the base electrode over a portion of the collector electrode. A metal film overlays the window to the collector electrode area and extends over a portion of the base electrode, thereby forming a metal-semiconductor barrier-type rectifying junction internally between the base electrode and the collector electrode.

Claims

1. A semiconductor device comprising:

a body of semiconductor material of one conductivity type and of relatively high resistivity, said body comprising the collector region of a transistor, a first region of opposite conductivity type to said body provided in one surface of said body, said first region comprising the base region of the transistor, a second region of said one conductivity type provided within a portion of said first region, said second region comprising the emitter region of the transistor, said first region and said second region emerging at said one surface of said body at adjacent positions, said body including a zone emerging at said one surface of said body, the lateral periphery of said zone being completely bounded by said first region and being disposed in contiguous relationship therewith, a metal contact disposed on said zone and partially on said first region but spaced from said second region, said metal contact establishing an ohmic contact with said first region and a rectifying barrier contact with said zone to define a metalsemiconductor junction integral with the collector region of the transistor providing an internal antisaturation clamp therefor to increase the switching speed of the transistor.

2. A semiconductor device as set forth in claim 1, wherein a pair of said second regions of said one conductivity type are provided within said first region in spaced apart relationship to define respective emitter regions of the transistor, and said zone of said body being located between said pair of second regions in spaced relationship with respect thereto.

3. A semiconductor device as set forth in claim 2, wherein said pair of second regions and said zone of said body are elongated and are arranged in parallel relationship extending transversely with respect to said first region.

4. A semiconductor device as set forth in claim 3, further including a substrate of semiconductor material, said body comprising an epitaxial layer formed on said substrate, said substrate including a substrate region of said one conductivity type and of relatively low resistivity, and said body including a pair of diffusion channels therethrough emerging at said one surface of said body at opposite ends of said first region, said diffusion channels being of said one conductivity type and of relatively low resistivity and in respective contacting relation to said substrate region.

5. A semiconductor device as set forth in claim 4, further including metal contacts establishing respective ohmic contacts with said pair of second regions and said pair of diffusion channels of said one conductivity type of relatively low resistivity. pg,18

6. A semiconductor device as set forth in claim 1, wherein said one conductivity type semiconductor material is N type material and said opposite conductivity type semiconductor material is P type material such that said collector, base, and emitter regions define an NPN transistor.