COMPLEMENTARY FIELD-EFFECT TRANSISTOR AMPLIFIER

• US 3,914,702 A
• Filed: 06/01/1973
• Issued: 10/21/1975
• Est. Priority Date: 06/01/1973
• Status: Expired due to Term

• Current Assignee: William Frederick Gehweiler
• Original Assignee: William Frederick Gehweiler
• Inventors: Gehweiler, William Frederick
• Primary Examiner(s): Lynch, Michael J.
• Assistant Examiner(s): Dahl, Lawrence J.
• Application Number:
  US05/365,834
• Time in Patent Office: 872 Days
• Field of Search: 307/304 330/13,17,18,35,3D,22,38M
• US Class Current: 330/264
• CPC Class Codes: H03F 1/0233 by using a signal derived from the output signal, e.g. bootstrapping the voltage supply
• CPC Class Codes: H03F 3/3028 with symmetrical driving of the end stage
• CPC Class Codes: H03F 3/345 with field-effect devices H03F3/347 takes precedence
• CPC Class Codes: H03G 1/007 using FET type devices
• CPC Class Codes: H03G 3/3015 using diodes or transistors

Abstract

A complementary field-effect transistor (FET) amplifier is biased to a given operating point by applying a reference potential to its input terminal and varying the operating potentials supplied to the amplifier in accordance with its output signal. At least one other complementary FET amplifier, integrated upon a common substrate with the first amplifier, receives operating potentials which also vary in accordance with the output signal of the first amplifier for maintaining the quiescent operating point of the other amplifier at a value substantially equal to the given operating point of the first amplifier.

Claims

1. In combination:

a plurality of amplifiers, each amplifier employing at least one pair of complementary field-effect transistors, each transistor of a given conductivity type being substantially similar to all other corresponding transistors of the same given conductivity type, each amplifier having an operating point which is responsive both to an input signal and operating potentials supplied to the amplifier and producing an output signal repreSentative thereof;

means for supplying quiescent bias at a reference voltage level to a selected amplifier of said plurality of amplifiers for establishing an operating point thereof;

means for supplying a signal to be amplified to at least one other amplifier of said plurality of amplifiers; and

control circuit means receptive of first and second substantially fixed potentials and responsive to the output signal produced by said selected amplifier for separately applying said operating potentials to each amplifier and changing the values of said operating potentials, as said output signal of said selected amplifier changes, in a sense to establish the operating points of all the amplifiers at stable and substantially identical values within a substantially linear amplification region associated with each amplifier.

2. The combination recited in claim 1 wherein each pair of complementary field-effect transistors is integrated upon a common substrate to obtain substantially similar characteristics between each transistor of a given conductivity type and all other corresponding transistors of the same conductivity type.

3. The combination recited in claim 1 wherein said transistors are selected to obtain substantially similar characteristics between each transistor of a given conductivity type and all other corresponding transistors of the same conductivity type.

4. The combination as set forth in claim 1 wherein each said amplifier comprises:

first and second complementary field-effect transistors, each having a conduction path and a control electrode for controlling the conduction of the path;

an input terminal coupled to the control electrodes of both transistors for receiving said input signal;

an output terminal coupled to one end of the conduction path of each transistor for providing said output signal; and

a pair of terminals, each separately coupled to the other ends of the conduction paths for receiving said operating potentials.

5. The combination recited in claim 4 wherein at least one of said amplifiers includes multiple stages of said first and second complementary field-effect transistors having said input and said output terminals thereof connected in cascade.

6. The combination recited in claim 5 wherein corresponding ones of each said pair of terminals of each said stage of said multiple stages are connected in common for receiving a single set of said operating potentials for jointly controlling the operating points of each stage of the multiple stages of said at least one amplifier.

7. The combination recited in claim 4 wherein said control circuit means comprises:

first and second circuit points for receiving said first and second substantially fixed potentials, respectively;

first variable impedance means separately coupling one of said pair of terminals of each amplifier to said first circuit point and having an impedance which varies in a given manner in response to the output signal produced by said selected amplifier; and

second variable impedance means separately coupling the other of said pair of terminals of each amplifier to said second circuit point and having an impedance which varies in a manner opposite to that of said first variable impedance means in response to said output signal produced by said selected amplifier.

8. The combination recited in claim 7 wherein:

said first variable impedance means comprises a separate field-effect transistor having a conduction path of a first conductivity type coupled between each said one of said pair of terminals of each amplifier and said first circuit point;

said second variable impedance means comprises another separate field-effect transistor having a conduction path of a second conductivity type coupled between said other of said pair of terminals of each amplifier and said second circuit point;

each transistor having a control electrode for controlling the conduction of its respective path, means coupling eacH control electrode in common; and

means coupling the commonly connected control electrodes to the output terminal of said selected amplifier.

9. The combination recited in claim 8 wherein said means coupling the commonly connected control electrodes to the output terminal of said selected amplifier comprises a different amplifier for both amplifying the signal present on said output terminal of said selected amplifier and adding thereto an offsetting potential for translating the operating points of each of said plurality of amplifiers in response to an offsetting signal supplied to said different amplifier.

10. In combination:

an amplifier comprising first and second complementary field-effect transistors, each transistor having a conduction path and a control electrode for controlling the conduction of the path, an input terminal coupled to the control electrodes of both transistors for receiving an input signal, an output terminal insulated from said input terminal and coupled to one end of the conduction path of each transistor for providing an output signal representative of said input signal, and a pair of terminals separately coupled to the other ends of said conduction paths, one terminal of the pair for receiving a first operating potential and the other terminal of the pair for receiving a second operating potential; and

control circuit means receptive of first and second fixed potentials and coupled to said one terminal and said other terminal for applying said first and second operating potentials to said one and said other terminal, respectively, said control circuit means being responsive to a control signal for changing the values of said operating potentials, each in the same sense, in response to a change in a given sense in said control signal, whereby said output signal produced as said output terminal is jointly representative of said input signal and said control signal.

11. The combination recited in claim 10 wherein said control circuit means comprises:

first and second circuit points for receiving said first and second fixed potentials respectively;

first variable impedance means coupled between said first circuit point and one of said pair of terminals and having an impedance which varies in a given sense in response to said control signal; and

second variable impedance means coupled between said second circuit point and the other of said pair of terminals, the impedance of which varies in a sense opposite to that of said first variable impedance means in response to said control signal.

12. The combination recited in claim 11 further comprising a control terminal for receiving said control signal and wherein the first and second variable impedance means comprises a pair of complementary field-effect transistors, each transistor having a conduction path and a control electrode for controlling the conduction of the path, one transistor having its conduction path coupled between said first circuit point and said one of said pair of terminals, the other transistor having its conduction path coupled between said second circuit point and said other of said pair of terminals and the control electrode of each transistor coupled in common to said control terminal.

13. The combination of:

a complementary symmetry field-effect transistor amplifier comprising a P-type transistor, a N-type transistor, each transistor having a conduction path and a control electrode for controlling the conductance of said path, said two paths connected in series between first and second operating voltage terminals, an output terminal at the connection of said two paths, and an input terminal insulated from said output terminal and connected to both control electrodes;

means coupled to said input terminal for quiescently biasing said amplifier at an operating point at which both transistors conduct;

terminals for a voltage source; and

means coupled to said terminals for said voltage source and to said outPut terminal and responsive to the output voltage at said output terminal for controlling the operating voltages applied to said first and second terminals to values to stabilize the operation of said amplifier at said operating point.

14. The combination of claim 13 wherein:

said means coupled to said output terminal comprises first and second voltage controlled impedance means, one of the type exhibiting an impedance which increases in response to an increasing control voltage and the other of the type exhibiting an impedance which decreases in response to an increasing control voltage, said first impedance means connected between said terminals for said voltage source and said second impedance means connected between said second and fourth terminals, said output terminal being connected to both impedance means and the output signal at said output terminal serving as the control voltage for both impedance means.

15. The combination recited in claim 14 wherein said first and second voltage controlled impedance means comprises another P-type field-effect transistor and another N-type field effect transistor, respectively, each having a conduction path and a control electrode for controlling the conduction of the path, the conduction path of said another P-type transistor coupled between said third and first terminals, to the first mentioned P-type transistor, the conduction path of said another N-type transistor coupled between said second and fourth terminals to the first mentioned N-type transistor and the control electrodes of both transistors coupled to said output terminal for receiving said control voltage.

16. The combination recited in claim 15 wherein said means coupled to said input terminal comprises means for placing said input terminal at a reference level substantially equal to an average value of said relatively fixed operating voltages.

17. The combination recited in claim 12 further comprising:

a plurality of said amplifiers;

means coupling said one terminal of each of said amplifiers in common;

means coupling said other terminal of each of said amplifiers in common; and

means directly coupling said plurality of amplifiers in cascade, the input terminal of a first one of said amplifiers for receiving said input signal and the output terminal of a last one of said amplifiers for providing said output signal.

18. The combination recited in claim 12 further comprising means coupling said control terminal to said output terminal.