Method of making multilayer printed circuit board

• US 3,932,932 A
• Filed: 09/16/1974
• Issued: 01/20/1976
• Est. Priority Date: 09/16/1974
• Status: Expired due to Term

• Current Assignee: ITT Corporation (ITT, Inc.)
• Original Assignee: International Telephone and Telegraph Corporation
• Inventors: Goodman, David S.
• Primary Examiner(s): Lanham, C. W.
• Assistant Examiner(s): Walkowski, Joseph A.
• Application Number:
  US05/506,058
• Time in Patent Office: 491 Days
• Field of Search: 29/624, 29/625, 29/628, 174/68.5, 317/101 B, 317/101 C, 317/101 CE, 317/101 CM, 339/17 R, 339/17 B, 339/17 C, 156/250, 156/252, 156/253
• US Class Current: 29/852
• CPC Class Codes: H01R 12/523 by an interconnection through aligned holes in the boards or multilayer board
• CPC Class Codes: H05K 1/0265 characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
• CPC Class Codes: H05K 2201/0195 Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
• CPC Class Codes: H05K 2201/0352 Differences between the conductors of different layers of a multilayer
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
• CPC Class Codes: H05K 3/445 having insulated holes or insulated via connections through the metal core
• CPC Class Codes: H05K 3/4626 characterised by the insulating layers or materials H05K3/4688 takes precedence
• CPC Class Codes: H05K 3/4641 having integrally laminated metal sheets or special power cores
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method of making a multilayer board in which relatively thick ground and voltage planes are punched to form clearance holes. The planes are stacked with insulative layers, laminated and then drilled to produce through holes aligned with the clearance holes. The through holes are then plated-through. The method eliminates under-etch problems in thick ground and voltage planes which are capable of carrying high magnitudes of current.

Claims

1. A method of making a multilayer printed circuit board comprising the steps of:

providing at least two individual metal sheets of a thickness which, if etched, would have an under-etch condition;

simultaneously punching a plurality of clearance holes in one of said sheets in a first predetermined pattern;

simultaneously punching a plurality of clearance holes in the other of said sheets in a second predetermined pattern;

filling said clearance holes with an insulative material;

stacking said sheets with an insulative inner layer therebetween and insulative outer layers on the top and bottom thereof with at least some of the clearance holes in the respective sheets misaligned;

laminating said stack of sheets and layers together to provide a unitary assembly;

drilling holes vertically through said stack coaxial with the clearance holes in each of said sheets, said through holes having a diameter less than that of said clearance holes; and

plating through said through holes with a conductive material.

2. A method as set forth in claim 1 wherein:

said metal sheets are self-supporting.

3. A method as set forth in claim 1 wherein:

each said metal sheet has a thickness of about 0.015 inch or greater.

4. A method as set forth in claim 1 wherein:

said second predetermined pattern of clearance holes is different from said first predetermined pattern; and

wherein said sheets and layers are stacked so that some of the clearance holes in the respective sheets are aligned.

5. A method as set forth in claim 4 including the additional step of:

forming metallic traces on the exposed planar surface of at least one of said outer insulative layers, with said traces connecting to said plated through holes passing through said aligned clearance holes.

6. A method as set forth in claim 5 wherein:

each said metal sheet is at least about 5 times thicker than said metallic traces.

7. A method as set forth in claim 1 wherein:

said clearance holes in said sheets are filled with an insulative material by coating the surface of said sheets with a prepreg prior to stacking said sheet and insulative layers.