Digital memory area correlation tracker
First Claim
1. A digital memory, area correlation tracking device with continuous television display of the tracked area comprising:
- a. a sensor,b. a video digitizer coupled to the sensor,c. a delay circuit connected to the video digitizer,d. a comparator connected in circuit with the delay circuit,e. a video selector connected to the delay circuit,f. a memory update control connected to the video selector,g. a shift register coupled to the video selector and also connected in circuit with the comparator,h. scanning means for generating a normal scan of the sensor in circuit with the sensor,i. a master clock connected in circuit with both the shift register and the scanning means whereby the shift register and the scanning means are positively syhchronized together, andj. integratinig means for modifying the normal scan of the sensor in response to the output of the comparator, connected between the comparator and the sensor.
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Abstract
A digital tracker which provides a continuous display of the area tracked mprising a delay line coupled in circuit with a comparator, a video digitizer and a sensor. The digital tracker further comprises circuit means connected between the delay line and the sensor for deriving an error correction signal in response to any mismatch between the present, delayed video scene and the reference scene, stored in the delay line. A staircase raster generator which can be positively synchronized with the delay line through the use of a common master clock is used as the sensor and the delay line is a shift register which enables any desired bit of the stored signal to be available for use at any time.
111 Citations
6 Claims
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1. A digital memory, area correlation tracking device with continuous television display of the tracked area comprising:
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a. a sensor, b. a video digitizer coupled to the sensor, c. a delay circuit connected to the video digitizer, d. a comparator connected in circuit with the delay circuit, e. a video selector connected to the delay circuit, f. a memory update control connected to the video selector, g. a shift register coupled to the video selector and also connected in circuit with the comparator, h. scanning means for generating a normal scan of the sensor in circuit with the sensor, i. a master clock connected in circuit with both the shift register and the scanning means whereby the shift register and the scanning means are positively syhchronized together, and j. integratinig means for modifying the normal scan of the sensor in response to the output of the comparator, connected between the comparator and the sensor. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification