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Implantable cardiac pacer with characteristic controllable circuit and control device therefor

  • US 3,945,387 A
  • Filed: 09/09/1974
  • Issued: 03/23/1976
  • Est. Priority Date: 09/09/1974
  • Status: Expired due to Term
First Claim
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1. An implantable cardiac pacer comprising:

  • a. pulse generator means for applying stimulus pulses to a heart, said generator means having at least one operating characteristic that is subject to variation,b. means for detecting control signals generated remotely from said pacer,c. ring counter means having a plurality of output terminals, said ring counter means being responsive to each in a succession of detected control signals by respectively changing the voltage states on said output terminals from a first state to different states to thereby produce a sequence of binary number representative signals on said output terminals,d. means connected with said output terminals and responsive to each binary number change thereon by varying said characteristic,e. means for resetting said ring counter means for its output terminals to attain said first state in response to a predetermined number of binary number states having occurred,f. said ring counter means comprising a series of interconnected flip-flops, said flip-flops respectively having output terminals (Q) and clock input signal terminals (C) and data input terminals, said flip-flops each being characterized by transferring whichever high or low state signal is on its data input terminal to its Q output terminal when a clock signal is applied to its C input terminal,g. said Q output terminal of the first and next flip-flops other than the last flip-flop in the series being connected to the ensuing data input terminal of subsequent flip-flops,h. said C input terminal being connected for simultaneously receiving a clock signal corresponding with each detected signal for sequentially advancing a signal that is initially on the data input terminal of the first flip-flop to the Q output terminal of the last flip-flop.i. gate means having a plurality of input terminals connected to receive signals opposite of the signals on the Q output terminals, respectively, of each but the last flip-flop in said series, said gate means having an output terminal coupled with the data input terminal of said first flip-flop, the output terminal of said gate means changing state when the flip-flops other than the last flip-flop are operated to have their output terminals all at the same state to thereby apply an initializing signal state to the data input terminal of said first flip-flop and to establish the Q input terminal of the last flip-flop in a final state corresponding with said initial state, whereby the next detected control signal will start recycling of said flip-flops, andj. the aforesaid ring counter output terminals being the points intermediate the Q output terminals and data input terminals of successive flip-flops.

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