Filtering device

• US 3,949,206 A
• Filed: 12/17/1974
• Issued: 04/06/1976
• Est. Priority Date: 12/17/1974
• Status: Expired due to Term

• Current Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Original Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Inventors: Edwards, Thomas R., Zeanah, Hugh W.
• Primary Examiner(s): Ruggiero, Joseph F.
• Application Number:
  US05/533,608
• Time in Patent Office: 476 Days
• Field of Search: 235/152, 235/156, 235/181, 328/167, 333/18, 333/28, 333/70 T, 325/42, 325/65
• US Class Current: 708/319
• CPC Class Codes: H03H 17/06 Non-recursive filters
• CPC Class Codes: H04B 3/142 using echo-equalisers, e.g. transversal

Abstract

An electrical filter for removing noise from a voice communications signal in which, for example, seven sample values of the signal are obtained continuously updated and subjected to filtering. Filtering is accomplished by adding balanced, with respect to a mid-point sample, spaced pairs of the sampled values and then multiplying each pair by a selected filter constant. The signal products thus obtained are summed to provide a filtered version of the original signal.

Claims

1. A filtering system for removing noise above 3,000 cycles from a continuous audio frequency signal of frequencies in the range of 300 to 3,000 Hertz comprising:

analog-to-digital conversion means responsive to such a said signal for providing as an output a continuous chain of digital signals representative of sampled points on said signal at a rate of at least 10,000 samples per second;

a chain of seven serially-connected shift registers, the input of the first of said shift registers being connected to the output of said analog-to-digital conversion means;

first, second, and third summing means, each having first and second inputs and an output, outputs of the first and last of said chain of said shift registers being connected as said first and second input signals to said first summing means, the outputs of the second and sixth of said chain of shift registers being connected as said first and second inputs of said second summing means, and the outputs of the third and fifth of the chain of said shift registers being connected to said first and second inputs of said third summing means;

first, second, third, and fourth product means, each comprising means for multiplying first and second applied inputs, an output of said first summing means being connected as a first input to first product means, the output of said second summing means being connected as a first input to said second product means, the output of said third summing means being connected as a first input to said third product means, and the output of the fourth of said chain of shift registers being connected to the first input of said fourth product means;

filter constant means for applying weighted values to said product means, a value of -2 being coupled to said second input of said first product means, a value of 3 being connected to the second input of said second product means, a value of 6 being connected to the second input of said third product means, and a value of 7 being connected to the second input of said fourth product means;

fourth summing means responsive to the outputs of said product means for providing as an output the sum of the outputs of said product means; and

digital-to-analog conversion means responsive to the output of said fourth summing means for reproducing said signal as modified by removal of signal noise content above 3,000 cycles.