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Circuit for generating a digital or analog signal as a function of doppler frequency

  • US 3,958,243 A
  • Filed: 03/20/1975
  • Issued: 05/18/1976
  • Est. Priority Date: 01/25/1974
  • Status: Expired due to Term
First Claim
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1. A circuit for generating an analog voltage that is a function of the frequency of a received doppler signal in a doppler satellite tracking station comprising:

  • a. a multiple-bit counter circuit having a first and a second input and a plurality of outputs;

    b. means for providing a doppler frequency signal having an output;

    c. a first gate circuit having an output and a first and a second input, said output being connected to said first input of said counter circuit, said first input of said gate circuit being connected to said output of said means for providing a doppler frequency signal;

    d. a storage register having a plurality of inputs connected to said plurality of outputs of said counter circuit such that said counter circuit and said storage register are in parallel, said storage register having a plurality of outputs, said plurality of outputs being a binary digital signal that is a function of the frequency of said doppler-frequency signal, said storage register also having a clock input;

    e. a digital-to-analog converter circuit having an input circuit and an output, said output being said analog voltage;

    f. means for providing an enable signal;

    g. means for gating in parallel said binary digital signal from said plurality of outputs of said storage register to said input circuit of said digital-to-analog converter input circuit whenever said enable signal is present, said enable signal being connected to said means for gating;

    h. means for providing a low-frequency signal having an output;

    i. means for providing a doppler-frequency correlation signal having an output;

    j. a circuit for generating control signals having a low-frequency signal input, a doppler-frequency correlation input, a gate signal output, a reset signal output, and a clock signal output, said low-frequency input being connected to said output of said means for providing a low-frequency signal, said doppler-frequency correlation input being connected to said output of said means for providing a doppler-frequency correlation signal, said gate signal output being connected to said second input of said gate circuit whereby said gate circuit is enabled when a control signal is at a logic 1 level on said gate signal output, said reset signal output being connected to said second input to said counter circuit whereby said counter circuit is reset when a control signal is present on said reset signal output, said clock signal output being connected to said clock input of said storage register wherein said storage register shifts the contents of said counter circuit into itself only when a control signal is present on said clock signal output, thereby said storage register remembers said digital signal that is a function of the frequency of said doppler-frequency signal until a control signal is present on said clock signal output.

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