Interference reduction circuit

• US 3,963,990 A
• Filed: 02/27/1974
• Issued: 06/15/1976
• Est. Priority Date: 02/27/1974
• Status: Expired due to Term

• Current Assignee: International Telecommunications Satellite Organization
• Original Assignee: Communications Satellite Corporation (Reorganized ISA SA)
• Inventors: DiFonzo, Daniel F.
• Primary Examiner(s): Safourek, Benedict V.
• Assistant Examiner(s): Bookbinder, Marc E.
• Application Number:
  US05/446,459
• Time in Patent Office: 839 Days
• Field of Search: 325/3, 325/4, 325/47, 325/56, 325/60, 325/65, 325/323, 325/324, 325/367, 325/366, 325/369, 325/371, 325/377, 325/378, 325/473, 325/474-476, 179/15 BC, 179/15 AN, 328/162, 328/165, 328/166, 333/10, 333/12, 333/21 A, 343/100 PE, 343/176, 343/756, 343/853
• US Class Current: 455/304
• CPC Class Codes: H04B 7/002 Reducing depolarization effects

Abstract

An interference reduction circuit to provide isolation in frequency reuse systems operates on two or more non-isolated signals by cross-coupling the signals such that the interfering signals are cancelled on each channel. In a dual-polarized frequency reuse system, cancellation is effected by adding a sample of an oppositely polarized channel of equal amplitude, but of opposite phase, to the interference. Practical implementation includes closed-loop, digital feedback control to permit dynamic signal-to-interference improvement involving no a priori knowledge of the nature of the incoming signals. The circuit has applications in satellites and earth stations in a communications satellite system.

Claims

1. An interference reduction circuit for use in a receiver of frequency reuse communications systems wherein a plurality of signals of the same frequency at predetermined different polarizations are transmitted from a remote location and the transmission media alters the relative polarizations between said plurality of signals thereby introducing cross-talk between the signals when they are received, said interference reduction circuit comprising:

a. a first plurality of hybrid coupling networks each receiving one of said transmission media altered signals and dividing each of said signals into a number of circuit paths equal in number to the number of received signals,

b. phase-shift means in each of said circuit paths for producing phase shifts in each of said signals, and

c. a second plurality of hybrid coupling networks each connected to one of said circuit paths from each of said first plurality of hybrid coupling networks after said phase-shift means for cross-coupling said circuit paths and thereby adding a sample of all other signals of equal amplitude, but opposite phase, to the cross-talk interference in each signal and thereby substantially cancelling the cross-talk interference in each signal to provide uncorrupted output signals at the outputs of said second plurality of hybrid coupling networks.

2. An interference reduction circuit as recited in claim 1 wherein said hybrid coupling networks are phase variable and said phase shift means are variable phase shifters.

3. An interference reduction circuit as recited in claim 2 wherein each of said variable hybrid coupling networks comprise:

a. a fixed power divider connected to receive a signal and dividing said signal into two channels,

b. first and second variable phase shifters connected into a respective one of said two channels, and

c. a fixed quadrature hybrid circuit connected to said two channels and providing two output circuit paths wherein any desired ratio of power division into said two circuit paths may be obtained by a suitable choice of phase shift.

4. An interference reduction circuit as recited in claim 1 wherein all of the phase shifts produced by each of said phase shift means are identical and each of the cross-coupling input/output division ratios of each of said second plurality of hybrid coupling networks are identical, said interference reduction circuit further comprising means preceding said first plurality of hybrid coupling networks for receiving non-orthogonal, elliptically polarized waves and linearizing the polarization of said waves.

5. An interference reduction circuit as recited in claim 4 wherein said means for linearizing comprises:

a. a rotatable phase shifter for receiving said non-orthogonal, elliptically polarized waves and providing as an output two waves having a fixed predetermined phase relation between the wave components, and

b. an orthomode transducer rotatable independently of said rotatable phase shifter for receiving said non-orthogonal, linearly polarized waves and providing as outputs said spatially non-isolated signals.

6. An interference reduction circuit as recited in claim 1 constructed as a microwave stripline circuit comprising a center "sandwich" of microwave stripline circuitry and two ground planes on either side of said center sandwich wherein said first plurality of hybrid coupling networks and said second plurality of hybrid coupling networks each comprises a plurality of striplines electrically isolated from one another but each one of said striplines crossing over at least one other stripline in close proximity thereto so as to couple a portion of the energy propagating along one stripline to another over which it crosses, and wherein said phase shift means comprises predetermined lengths of said striplines.

7. An interference reduction circuit as recited in claim 1 wherein said phase shift means are variable phase shifters and further including variable attenuator means in each of the cross-coupled circuit paths for variably attenuating the signals in said cross-coupled circuit paths.

8. An interference reduction circuit as recited in claim 7 wherein a different pilot signal is transmitted with each of said plurality of signals, said interference reduction circuit further comprising feedback means responsive to the outputs of said second plurality of hybrid coupling networks for detecting a pilot signal indicative of the amount of interference in each of said output signals and adjusting said variable phase shifters and said variable attenuating means in each of said cross-coupled circuit paths to reduce said pilot signal to a minimum.

9. An interference reduction circuit as recited in claim 8 wherein said feedback means comprises for each cross-coupled circuit path:

a. receiving means connected to the output of the hybrid coupling network receiving the cross-coupled circuit path and tuned to said pilot signal and providing a detected output signal representative of the amount of cross-talk interference in that cross-coupled circuit path, and

b. control network means receiving said output signal and providing two output control voltages, one of said control voltages being used to control said variable phase shifter and the other control voltage being used to control said variable attenuator means in the cross-coupled circuit path.

10. An interference reduction circuit as recited in claim 9 wherein said control network means is a digital control network and further comprising an analog-to-digital convertor connected to receive said output signal from said receiving means and provide a digital output to said digital control network, and first and second digital-to-analog convertors connected to receive digital outputs from said digital control network and providing said two ouput control voltages.

11. An interference reduction circuit as recited in claim 10 wherein said digital control network comprises:

a. means for storing a digital word representing the last value of said output signal from said receiving means,

b. means for digitally comparing the digital word representing the last value of said output signal and a digital word representing the present value of said output signal and providing an output indicative of the result of the comparison,

c. means for accumulating a first count in either of two directions, said first count digitally representing the value of the control voltage to be applied to said variable phase shifter,

d. means for accumulating a second count in either of two directions, said second count digitally representing the value of the control voltage to be applied to said variable attenuator means, and

e. means responsive to the output of said comparing means for controlling the accumulation of said first and second counts in both said accumulating means.

12. An interference reduction circuit as recited in claim 11 wherein said means responsive to the output of said comparing means comprises:

a. a first flip-flop which changes state whenever the present value of said output signal from said receiving means exceeds the last value of said output signal, the outputs of said first flip-flop controlling the direction of accumulation of said first and second counts in both said accumulating means, and

b. a second flip-flop which changes state after either a first predetermined number of changes of state of said first flip-flop or a second predetermined number of counts are accumulated in one or the other or the two accumulating means, the outputs of said second flip-flop controlling which of said two accumulating means are accumulating a count at any one time.

13. An interference reduction circuit for use in a receiver of frequency reuse communications systems wherein a plurality of signals of the same frequency at predetermined different polarizations are transmitted from a remote location and the transmission media alters the relative polarizations between said plurality of signals thereby introducing cross-talk between the signals when they are received, said interference reduction circuit comprising:

a. a first plurality of power dividers each receiving one of said transmission media altered signals and dividing each of said signals into a number of circuit paths equal in number to the number of received signals,

b. a plurality of variable phase shifters, one in each of said circuit paths for producing variable phase shifts in each of said signals,

c. a second plurality of power dividers connected in a reciprocal manner to said first plurality of power dividers, each of said second plurality of power dividers being connected to one of said circuit paths from each of said first plurality of power dividers after said variable phase shifters for cross-coupling said circuit paths and thereby adding a sample of all other signals of equal amplitude, but opposite phase, to the cross-talk interference in each signal and thereby substantially cancelling the cross-talk interference in each signal to provide uncorrupted output signals at the outputs of said second plurality of power dividers, and

d. amplifying means in said circuit paths for amplifying said signals.