Method for fabricating multilayer insulator-semiconductor memory apparatus
First Claim
1. A semiconductor-insulator1 -insulator2 layered structure made by a process which includes the step of depositing an oxide of a metallic impurity on the then exposed surface of the insulator1 layer, prior to the fabrication of the insulator2 layer, in an amount yielding between about 1014 and 4 ×
- 1015 metallic impurity nuclei per square centimeter.
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Abstract
An SI1 I2 M (semiconductor-insulator1 -insulator2 -metal) memory structure, containing an impurity such as tungsten concentrated in a region including the interface ("I1 I2 ") region between the I1 and I2 region, is fabricated by depositing an oxide of the impurity, such as tungsten trioxide, on the then exposed, I1 layer prior to fabricating the I2 layer. The oxide of the impurity, such as tungsten trioxide, can be advantageously deposited by means of reactive evaporation.
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Citations
16 Claims
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1. A semiconductor-insulator1 -insulator2 layered structure made by a process which includes the step of depositing an oxide of a metallic impurity on the then exposed surface of the insulator1 layer, prior to the fabrication of the insulator2 layer, in an amount yielding between about 1014 and 4 ×
- 1015 metallic impurity nuclei per square centimeter.
- View Dependent Claims (6, 8, 9, 10)
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2. A semiconductor-insulator1 -insulator2 -metal layered structure made by a process including the steps of
a. forming the insulator1 layer on the semiconductor layer; -
b. depositing an oxide of a metallic impurity on the then exposed surface of the insulator1 layer in an amount yielding between about 1014 and 4 ×
1015 nuclei of the metallic impurity per square centimeter;
followed byc. forming the insulator2 layer on the insulator1 layer. - View Dependent Claims (3, 4, 7)
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5. In a method for fabricating a memory apparatus comprising a semiconductor insulator1 -insulator2 -metal layered structure which contains metallic impurities in a predetermined molecularly dispersed surface concentration, without clumping which would form a Fermi level of the metallic impurities, in an interface insulator region (including the interface of the insulator layers), said impurities in a concentration supplying suitable states for the capture of electronic charges in said region, the step of depositing molecules of an oxide of the metallic impurity on the then exposed surface of the insulator1 layer in an amount yielding said surface concentration of metallic impurities.
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11. In a method for fabricating a semiconductor insulator1 -insulator2 -metal layered structure, in which the semiconductor is essentially silicon and in which the insulator1 layer is essentially silicon dioxide, and in which a first interface insulator region (including the interface of the insulator layers) contains metal impurity nuclei which are dispersed in said insulator region without clumping which would form a Fermi level of the metal impurity, the step of depositing molecules of an oxide of the metal impurity on the then exposed surface of the insulator1 layer to a surface concentration corresponding to between about 1 ×
- 1014 and about 4 ×
1015 of said metal impurity nuclei per square centimeter prior to depositing the insulator2 layer. - View Dependent Claims (12, 13, 14, 15, 16)
- 1014 and about 4 ×
Specification