Multi-terminal controlled-inversion semiconductor devices
First Claim
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1. Controlled inversion semiconductor circuit means comprising:
- semiconductor body means having first and second spaced surface means,non-linear resistive layer means affixed to said first surface means,conductive layer means affixed to said non-linear resistive layer means opposite said semiconductor body means,first electrical signal source means for applying a first control signal between said conductive layer means and said second surface means,minority carrier generator means within said semiconductor body means for generating an inversion layer within said semiconductor body means at said non-linear resistive layer means when said first control voltage reaches a predetermined threshold value,said non-linear resistive layer means tending to prevent formation of said inversion layer when said first control signal remains below said predetermined threshold value,second electrical signal source means for applying a second control signal between said second surface means and ohmic contact means disposed on said semiconductor body means between said minority carrier generator means and said non-linear resistive layer means for further controlling the supply of minority carriers reaching said inversion layer, andutilization means in series relation with said first electrical signal source means and said conductive layer means.
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Abstract
Multi-terminal controlled-inversion semiconductor devices are presented having current or voltage controllable switching characteristics provided through use of a non-linear resistive layer and by the control of the rate of injection of carriers with respect to their rate of removal by conduction through the non-linear layer.
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Citations
24 Claims
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1. Controlled inversion semiconductor circuit means comprising:
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semiconductor body means having first and second spaced surface means, non-linear resistive layer means affixed to said first surface means, conductive layer means affixed to said non-linear resistive layer means opposite said semiconductor body means, first electrical signal source means for applying a first control signal between said conductive layer means and said second surface means, minority carrier generator means within said semiconductor body means for generating an inversion layer within said semiconductor body means at said non-linear resistive layer means when said first control voltage reaches a predetermined threshold value, said non-linear resistive layer means tending to prevent formation of said inversion layer when said first control signal remains below said predetermined threshold value, second electrical signal source means for applying a second control signal between said second surface means and ohmic contact means disposed on said semiconductor body means between said minority carrier generator means and said non-linear resistive layer means for further controlling the supply of minority carriers reaching said inversion layer, and utilization means in series relation with said first electrical signal source means and said conductive layer means. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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Specification