Apparatus utilizing analog-to-digital conversion in the photoelectric reading of documents

• US 3,983,364 A
• Filed: 07/03/1972
• Issued: 09/28/1976
• Est. Priority Date: 07/03/1972
• Status: Expired due to Term

• Current Assignee: National Computer Systems, Inc. (Pearson plc)
• Original Assignee: National Computer Systems, Inc. (Pearson plc)
• Inventors: Firehammer, John D., Gruebele, Dale W.
• Primary Examiner(s): Sloyan, Thomas J.
• Application Number:
  US05/268,445
• Time in Patent Office: 1,548 Days
• Field of Search: 235/61.6 E, 235/61.11 E, 235/61.11 R, 235/61.6 A, 35/48 B, 35/48 R, 328/151, 178/DIG. 3, 179/15.55 R, 179/15 A, 179/15 R, 179/15 AP, 340/347 SH, 340/146.3 AC
• US Class Current: 434/358
• CPC Class Codes: G06K 17/0032 Apparatus for automatic testing and analysing marked record carriers, used for examinations of the multiple choice answer type teaching apparatus working with questions and answers G09B7/00
• CPC Class Codes: G06K 7/14 using light without selection of wavelength, e.g. sensing reflected white light G06K7/10831 - G06K7/1097 take precedence

Abstract

An examination answer sheet, on which the examinee has darkened certain discrete areas with a graphite or lead pencil to denote his selected answers to multiple choice questions, is moved relative to a plurality of photoelectric cells, these cells providing analog voltages having magnitudes in accordance with the opacity of the marks or data on the sheet. During time intervals derived photoelectrically from a sequence of marks constituting a timing track, the highest voltages provided by the data cells are individually stored, later digitized, and the digital information forwarded to a computer for comparative processing with answer information contained in the computer'"'"'s memory.

Claims

1. Apparatus for scoring an answer sheet having discrete response areas thereon, the darkening of a particular area within a group of areas denoting the answer to a question selected by an examinee, a plurality of fixedly located photoelectric cells, means for feeding the answer sheet relative to said photoelectric cells, said photoelectric cells providing individual analog voltage signals representative of the degree of opacity for the particular areas positioned in juxtaposition to said photoelectric cells so that said areas are sensed by said photoelectric cells, respective means for storing the maximum value of each voltage signal reached during a certain period as said areas move relative to said photoelectric cells, means for converting said stored analog voltage signals to digital signals including a lesser number of analog-to-digital converters than the number of photoelectric cells, the number of said storage means corresponding to the number of photocells, and means for successively connecting said converters to one group of said storage means corresponding in number to the number of converters and then to a second group of said storage means corresponding in number to the number of converters, and means for processing said digital signals to ascertain the correctness or error of a particular answer.

2. Apparatus for photoelectrically reading an answer sheet having a group of discrete areas and at least one timing mark thereon, the darkening of a particular area denoting certain information or data by reason of the resulting mark, the apparatus comprising photoelectric means, means for relatively moving the answer sheet with respect to said photoelectric means to effect said photoelectric reading, said photoelectric means providing an analog voltage signal having a magnitude in accordance with the opacity of the mark when said sheet is in a position to be read by said photoelectric means, means for converting said analog signal into a digital signal having a value generally representative of the magnitude of said analog voltage signal, means for storing said analog voltage signal, first switch means for connecting said storing means to said converting means when a stored analog voltage signal is to be converted, second switch means for connecting said photoelectric means to said storage means during a particular time interval, and additional photoelectric means responsive to said timing mark for causing said second switch means to close and thereby connect said first photoelectric means to said storing means during said time interval, said storing means including a capacitor, a diode connected between said second switch means and said capacitor and third switch means in parallel with said diode, said third switch means being closed to by-pass said diode when no timing mark is present.

3. The apparatus of claim 2 including a logic circuit connected to said additional photoelectric means, said logic circuit controlling said second and third switch means.

4. The apparatus of claim 3 in which said converting means includes a plurality of analog-to-digital converters, said photoelectric means including a plurality of photoelectric circuits, said storage means including a plurality of storage circuits each having a capacitor therein, and said second switch means sequentially connects a group of said storage circuits to the inputs of said plurality of analog-to-digital converters.

5. The apparatus of claim 4 including means for supplying a plurality of reference voltages having values for compensating for differences between the photoelectric cells contained in said plurality of photoelectric circuits, and fourth switch means controlled by said logic circuit for connecting said supplying means to said analog-to-digital converter to connect the appropriate reference voltages to said analog-to-digital converters when said second switch means connects said plurality of converters to said storage means.

6. The apparatus of claim 5 including a computer connected to the output of said converters.

7. The apparatus of claim 6 in which each converter includes a binary register and a binary weighted network.

8. The apparatus of claim 7 in which each converter includes a comparator having one input connected to said binary weighted network and a second input connected to said second switch means.

9. The apparatus of claim 8 in which each converter additionally includes a binary decision circuit connected to the output of said comparator and control circuitry connected between said binary decision circuit and said register.

10. Apparatus for optically reading information from an answer sheet containing timing marks and various discrete answer areas thereon, the apparatus comprising means for moving said answer sheet, a reading head including a first photoelectric cell disposed with respect to said moving means for sensing the passage of a timing mark and a plurality of additional photoelectric cells disposed relative to said moving means for sensing the passage of answer areas to provide analog voltages having magnitudes in accordance with the opacity of the answer areas sensed thereby, a logic circuit, means connected to said first photoelectric cell for producing a pulse in response to the passage of a timing mark relative to said first photoelectric cell, a storage circuit connected to each of said additional photoelectric cells for storing the highest voltage sensed by the particular photoelectric cell to which it is connected during the period of said pulse, a lesser number of analog-to-digital converters than the number of said additional photoelectric cells, and the number of storage circuits connected thereto, each being capable of providing a digital signal at its output representative of the magnitude of the analog voltage signal applied to its input, switch means for connecting successive groups of said storage circuits to the inputs of said analog-to-digital converters so that digital signals are derived at the outputs of said converters having values corresponding generally to the magnitudes of said stored voltage signals, and means connected to the outputs of said analog-to-digital converters for storing said successively derived digital signals.

11. The apparatus of claim 10 in which said last-mentioned means constitutes a programmed computer.

12. The apparatus of claim 11 including means for supplying reference voltages to said analog-to-digital converters.

13. The apparatus of claim 12 in which said reference voltages are supplied to said converters via additional switch means.

14. The apparatus of claim 13 in which both of said switch means are controlled by said logic circuit.