Method of fabricating a semiconductor device

• US 3,988,214 A
• Filed: 06/13/1969
• Issued: 10/26/1976
• Est. Priority Date: 06/17/1968
• Status: Expired due to Term

• Current Assignee: Nippon Electric Company Limited (NEC Corporation)
• Original Assignee: Nippon Electric Company Limited (NEC Corporation)
• Inventors: Tsunemitsu, Hideo
• Primary Examiner(s): Tufariello, T. M.
• Application Number:
  US04/833,095
• Time in Patent Office: 2,692 Days
• Field of Search: 204/15, 317/234, 317/101, 174/68.5, 117/212, 29/577, 357/73, 357/54
• US Class Current: 205/124
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02183 the material containing tantalum, e.g. Ta2O5
• CPC Class Codes: H01L 21/02186 the material containing titanium, e.g. TiO2
• CPC Class Codes: H01L 21/02203 the layer being porous
• CPC Class Codes: H01L 21/02258 formation by anodic treatment, e.g. anodic oxidation
• CPC Class Codes: H01L 21/31687 by anodic oxidation
• CPC Class Codes: H01L 21/76801 characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
• CPC Class Codes: H01L 21/76819 Smoothing of the dielectric planarisation of insulating materials per se H01L21/31051
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 2221/1047 the air gaps being formed by pores in the dielectric
• CPC Class Codes: H01L 23/291 Oxides or nitrides or carbides, e.g. ceramics, glass
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/5283 Cross-sectional geometry
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

An integrated circuit device with multi-level interconnection wiring structure built upon the substrate wherein each level is formed of conductor and insulator portions and wherein each level has a surface substantially parallel to the surface of the substrate.

The method of fabricating the above-described device wherein a suitable substance such as aluminum is deposited over the surface of the substrate to form a metal film, and wherein the aluminum or other substance is then selectively anodized into insulating portions around conducting channels.

Claims

1. A method of manufacturing a semiconductor device including a lead-out wiring structure comprising the steps of;

preparing a semiconductor substrate including at least one circuit component therein and covered with an insulative film at the surface thereof, said insulative film having at least one opening formed therein,

depositing a conductive metal film on said semiconductor substrate, said conductive metal film being electrically connected to said semiconductor substrate through said opening in said insulative film, and

selectively anode-oxidizing said conductive metal film by applying an electrical voltage between said semiconductor substrate with said conductive metal film and an anode forming solution to form conductive channels in said conductive metal film, said conductive channels being isolated from one another by the resulting oxide of the metal of said conductive metal film.

2. The method of claim 1, wherein said conductive metal film deposited on said semiconductor substrate is comprised of a metal selected from the group consisting of aluminum, titanium, tantalum, niobium and hafnium.

3. The method of claim 1, wherein said conductive metal film is comprised of aluminum or tantalum.

4. The method of claim 1, wherein said selective anode-oxidizing step includes the steps of;

making selected portions of said conductive metal film at the locations of said intended conductive channels, at least one of said intended conductive channels being electrically connected to said semiconductor substrate through said opening in said insulative film, and

converting the entire thickness of the unmasked area to anodized oxide.

5. The method of claim 4, wherein said conductive metal film is comprised of aluminum or tantalum.

6. The method of claim 1, wheren said selective anode-oxidizing step includes the steps of

masking a selected portion of said conductive metal film at a location of an intended insulating area,

converting a partial thickness of the unmasked area of said conductive metal film to anodized non-porous oxide,

unmasking the portion of said conductive metal film previously covered, and

converting the entire thickness of the previously masked portion of said conductive metal film to anodized porous oxide.

7. The method of claim 6, further including the step of converting small peripheral portions of said conductive channels into anodized non-porous oxide.

8. The method of claim 6, wherein said conductive metal film is comprised of aluminum.

9. The method of claim 1, wherein said selective anode-oxidizing step includes the steps of;

masking portions of said conductive metal film at the locations of the intended conductive channels,

converting the entire thickness of the unmasked area of said conductive metal film to anodized porous oxide,

unmasking the portions of said conductive metal film previously covered, and

converting a partial thickness of at least a part of the surface of the previously masked portions of said conductive metal film to anodized non-porous oxide.

10. The method of claim 9, wherein said conductive metal film is comprised of aluminum.

11. The method of claim 10, wherein small peripheral portions of said conductive channels are converted to anodized non-porous oxide.

12. The method of claim 11, wherein the whole surface of said previously masked portions of said conductive metal film is converted to anodized non-porous oxide film to a partial thickness, and an opening is provided in each anodized non-porous oxide film covering each of said previouly masked portions.

13. In the fabrication of an integrated semiconductor microcircuit wherein PN-junctions are passivated by an insulation layer, and wherein access windows are provided in the insulation layer for permitting ohmic contacts to be made to selected semiconductor regions, the improvement comprising:

depositing a conductor film on said windowed insulation layer; and

electrolytically converting selected portions of said conductor film to a nonconductor.

14. A method as defined by claim 13, wherein said converting step includes the step of masking a selected are of the conductor film and selectively converting the entire thickness of the unmasked portion to a nonconductor electrolytic anodization.

15. A method as defined by claim 14, wherein the converting step comprises immersing the masked structure in an electrolytic bath, connecting the conductor as the anode of an eectrolytic cell, and passing a suitable current through the cell, whereby the exposed areas are selectively oxidezed.

16. A method for the selective metallizaiton of a substrate comprising:

forming an insulation film on said substrate;

forming openings in said insulation film at location where electrical contact is desired to subjacent material;

depositing a metal film on said insulation film;

selectively masking said metal film to provide a mask pattern corresponding to the desired metallization pattern; and

electrolytically converting the unmasked areas of said metal film to a nonconductor to form an inlaid metallization pattern.