Multiple parameter monitoring and readout system with sampling of parameters of higher priority than the highest parameter which is out of tolerance
First Claim
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1. An adjustable length ring counter having a clock input, a program input, and a plurality of ordered outputs comprising:
- a shift register having a plurality of ordered outputs, a clock input, and a reset input, a sequential one of the ordered outputs assuming an activated state in response to a succeeding clock input signal, the initial ordered output being activated state in response to a reset input signal, by the next clock input signal following receipt of a reset input signal,an array of logic gates, each gate having a pair of inputs and an output, the output assuming an activated state corresponding to both of its inputs assuming an activated state, the logic output otherwise inactivated,a reset logic gate having a plurality of inputs and an output, the output of the reset gate assuming an activated state corresponding to each of its inputs assuming a nonactivated state, the output otherwise assuming a nonactivated state,each shift register ordered output connected to a corresponding one of the ring counter ordered outputs,each gate first input connected to a corresponding one of the ring counter ordered outputs, the outputs of all gates connected to the shift register reset input, the second input of all other than the final gate in the array connected to a program terminal,each reset logic gate input connected to one of the counter ordered outputs other than the final ordered output which is coupled to the first input of the final logic gate in the array, the output of the reset gate connected to the second input of the final logic gate in the array,whereby with the program input inactivated, successive clock input signals cause a successive one of the counter outputs to assume an activated state until the final ordered output state whereby a subsequent clock input signal causes the initial ordered output to assume an activated state, whereas with the program input activated a subsequent clock input signal causes the initial ordered output to assume an activated state.
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Abstract
Apparatus for monitoring and indicating parameter conditions within a system. Signals are generated by sensors which monitor parameter state. The signals are sensed via a multiplexing scheme, each signal being compared to an individually programmed reference. Should a parameter signal exceed the reference, a corresponding indicator is activated. Each parameter is prioritized such that a parameter signal which exceeds its reference will cause the multiplex network to sequentially sense only that parameter and all other parameters of a higher priority. Further refinements allow the readout of the value of a parameter signal if the parameter exceeds its reference or if such readout is manually selected.
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Citations
18 Claims
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1. An adjustable length ring counter having a clock input, a program input, and a plurality of ordered outputs comprising:
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a shift register having a plurality of ordered outputs, a clock input, and a reset input, a sequential one of the ordered outputs assuming an activated state in response to a succeeding clock input signal, the initial ordered output being activated state in response to a reset input signal, by the next clock input signal following receipt of a reset input signal, an array of logic gates, each gate having a pair of inputs and an output, the output assuming an activated state corresponding to both of its inputs assuming an activated state, the logic output otherwise inactivated, a reset logic gate having a plurality of inputs and an output, the output of the reset gate assuming an activated state corresponding to each of its inputs assuming a nonactivated state, the output otherwise assuming a nonactivated state, each shift register ordered output connected to a corresponding one of the ring counter ordered outputs, each gate first input connected to a corresponding one of the ring counter ordered outputs, the outputs of all gates connected to the shift register reset input, the second input of all other than the final gate in the array connected to a program terminal, each reset logic gate input connected to one of the counter ordered outputs other than the final ordered output which is coupled to the first input of the final logic gate in the array, the output of the reset gate connected to the second input of the final logic gate in the array, whereby with the program input inactivated, successive clock input signals cause a successive one of the counter outputs to assume an activated state until the final ordered output state whereby a subsequent clock input signal causes the initial ordered output to assume an activated state, whereas with the program input activated a subsequent clock input signal causes the initial ordered output to assume an activated state.
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2. A system for monitoring and indicating a plurality of prioritized parameters comprising:
a plurality of sensors, at least one sensor located at each parameter site, each sensor producing an electrical output proportional to the magnitude of the sensed parameter, - View Dependent Claims (4, 6)
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3. a multiplexing means sequentially sampling and transferring the sensor outputs in prioritized order, and programmable to return to the highest priority sensor in response to a program signal,
a programmed reference means sensing the status of the multiplexing means and providing an output of variable magnitude predeterminedly fixed and dependent in response thereto, means for comparing the transferred sensor output to the programmed reference output including means for generating and coupling a program signal to the multiplexing means in response to a conditional relationship between the compared signals, a means for indicating sensor status including means for sensing multiplexer status and comparator status, activating the indicating means in response thereto, whereby a parameter which does not meet the condition dictated by its reference is indicated, the multiplexing means thereafter sensing only the out of condition parameter and all higher priority parameters.
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8. A system for monitoring and indicating a plurality of prioritized parameters (in a vehicle) comprising:
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a plurality of sensors, at least one sensor located at each of the parameter sites, each sensor producing an electrical output proportional to the magnitude of the sensed parameter, an array having a plurality of ordered first circuit means, each means having an input, an output and a control terminal, the input of each one of the means coupled to a particular one of the sensor outputs, the control terminal connecting the input to the output upon receiving a command signal thereto, all outputs connected in common, a second circuit means having a plurality of ordered outputs, a sequencer input, and a program input, each ordered output coupled to a corresponding one of the first circuit means control terminals, a successive one of the ordered outputs assuming an activated state in response to each sequence signal applied to the sequencer input, the first ordered output assuming an activated state corresponding to a reset signal applied to the program input, a sequence signal generating means coupled to the sequencer input, a programmed reference supply means having a plurality of ordered command input terminals, and a controlled output terminal, each ordered command input terminal coupled to a corresponding one of the second circuit means ordered outputs, the controlled output terminal assuming a value predeterminedly fixed and dependent upon the state of the command input terminals, a comparator means having a first input, a second input, and a logic output, the first input coupled to the first circuit means outputs, the second input coupled to the controlled output terminal, the logic output assuming a first state in response to a first relationship between the two inputs, the logic output otherwise assuming a second state, an ordered array of gate means, each gate means having a pair of inputs, and an output, one of the inputs of each gate means coupled to a corresponding one of the first circuit means ordered outputs, the second input of each gate means coupled to the comparator logic output, each gate means output assuming an activated state when each of its inputs assume activated states, the gate means output otherwise assuming an inactivated state, an ordered array of indicators, each indicator connected to a corresponding one of the gate means outputs, the indicator producing an output upon activation.
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16. A system for monitoring and indicating a plurality of prioritized parameters (in a vehicle) comprising:
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a plurality of sensors, at least one sensor located at each of the parameter sights, each sensor producing an electrical output proportional to the magnitude of the sensed parameter, an electronic switch array having a plurality of ordered switches, each switch having a first pole, a second pole and a control terminal, the first pole of each of the switches coupled to a particular one of the sensor outputs, the control terminal connecting the first pole to the second pole upon receiving a command signal thereto, all second poles in common, an adjustable length ring counter having a plurality of ordered outputs, a sequencer input, and a program input, each ordered output coupled to a corresponding one of the switch control terminals, a successive one of the ordered outputs assuming an activated state in response to each sequence signal applied to the sequencer input, the first ordered output assuming an activated state corresponding to a reset signal applied to the program input, a sequence signal generating means coupled to the sequencer input, a programmed reference supply means having a plurality of ordered command input terminals, and a controlled output terminal, each ordered command input terminal coupled to a corresponding one of the ring counter ordered outputs, the controlled output terminal assuming a value predeterminedly fixed and dependent upon the state of the command input terminals, a comparator means having a first input, a second input, and a logic output, the first input coupled to the second poles, the second input coupled to the controlled output terminal, the logic output assuming a first state if the signal at its first input is more positive than the signal at its second input, the logic output otherwise assuming a second state, a logic controlled switch having a first terminal, a second terminal and a logic controlled terminal, the first terminal coupled to the comparator first input, the logic controlled terminal coupled to the comparator logic output, the first logic controlled switch terminal connected to the second logic controlled switch terminal corresponding to a predetermined logic signal applied to the logic controlled terminal, the first and second terminals of the logic controlled switch otherwise disconnected, a readout means coupled to the second terminal of the logic controlled switch, the readout means indicating the magnitude of the signal coupled thereto, a logic gate having a pair of inputs and an output, the gate inserted in series in the coupling between the comparator logic output and the logic controlled switch logic controlled terminal, the first input of the gate connected to the logic output, the gate output connected to the logic controlled terminal, the logic gate output assuming an activated state if either input assumes an activated state, the logic output otherwise assuming a nonactivated state.
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18. A monitoring and indicating system comprising:
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sensing means for continuously monitoring a plurality of prioritized engine parameters and providing for each parameter a separate electrical output signal representative of the status thereof, programmable reference supply means for providing a reference output voltage having a predetermined fixed value corresponding to each of the parameters, circuit means having one input terminal adapted for coupling to the sensing means and the other input terminal adapted for coupling to the programmable reference supply means for generating an alarm signal when the output signal level from the sensing means is out of tolerance with respect to the signal level of the reference supply means, variable length ring counter means for repeatedly sequentially coupling the sensing means monitoring a selected one of the parameters to the one terminal of the circuit means while simultaneously repeatedly sequentially activating the programmable reference supply means to cause the corresponding parameter reference voltage to be coupled to the other terminal of the circuit means, an output signal appearing at the circuit means being coupled to the variable length ring counter for shortening the sequencing cycle thereof to sequence through only the parameters having equal or greater priority than the parameter causing the output signal to appear at the circuit means, and means for indicating the alarm signal.
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Specification
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Current AssigneeMotorola, Inc. (Motorola Solutions, Inc.)
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Original AssigneeMotorola, Inc. (Motorola Solutions, Inc.)
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InventorsValker, Henry W.
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Primary Examiner(s)Caldwell, John W.
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Assistant Examiner(s)Wannisky, William M.
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Application NumberUS05/537,746Time in Patent Office665 DaysField of Search340/412, 340/413, 340/414, 340/52 R, 340/52 F, 328/43, 328/48, 328/71, 328/75, 307/221 R, 307/223 RUS Class Current340/459CPC Class CodesG07C 5/0808 Diagnosing performance data...G08C 15/06 successively, i.e. using ti...
