Method of manufacture of an epitaxial semiconductor layer on an insulating substrate

• US 3,997,381 A
• Filed: 01/10/1975
• Issued: 12/14/1976
• Est. Priority Date: 01/10/1975
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Wanlass, David R.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US05/540,010
• Time in Patent Office: 704 Days
• Field of Search: 156/3, 156/7, 156/17, 156/605, 252/79.3, 252/79.4, 29/580, 29/583, 204/129.2
• US Class Current: 438/10
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 21/30 Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 manufacture of electrodes thereon H01L21/28
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: Y10S 148/012 Bonding, e.g. electrostatic for strain gauges
• CPC Class Codes: Y10S 148/085 Isolated-integrated
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A thin epitaxial layer of silicon is disposed on a supporting silicon substrate and a silicon oxide layer or other suitable layer is formed on the epitaxial layer. The substrate, epitaxial layer and oxide layer sandwich is bonded by the simultaneous application of heat and voltaic pressure to another oxidized substrate such that the epitaxial layer is sandwiched between the two substrates with the oxide layer at the sandwich interface. Alternatively, the substrates may be joined by bonding without the use of voltaic pressure by placing the substrates (parent and supporting) at approximately 900° C. The substrates with the epitaxial layer is processed to remove a substantial portion of the silicon substrate with the final portion being removed by etching. When the final portion of the silicon substrate is removed by etching, exposing the epitaxial silicon layer, the etching rate changes dramatically and this is reflected in the byproduct concentration in the etchant solution. The etching process is immediately terminated when the epitaxial layer is fully exposed. After further finishing steps, the resulting product of this method is an epitaxial monocrystalline silicon layer of high crystalline perfection, separated by a silicon oxide layer from a supporting silicon substrate.

Claims

1. A method for fabricating a semiconductor wafer comprising:

starting with a silicon monocrystalline, parent substrate;

forming an epitaxial, silicon, monocrystalline layer upon said parent substrate, said epitaxial layer having substantially different doping concentrations than said parent substrate;

forming an insulating layer on said parent substrate with epitaxial layer and on a silicon, supportive substrate;

bonding said parent and supportive substrates whereby said insulating layers on said parent and supportive substrates are in physical contact and whereby said epitaxial layer is positioned between said parent and supportive substrates;

lapping a portion of said parent substrate;

etching said parent substrate by a preferential chemical etchant;

measuring an electromotive force between an electrode pair immersed in said chemical etchant; and

adding an oxidizing agent to said etchant in response to said measuring of electromotive force to control the etching characteristics of said etchant and to terminate said etching when removal is substantially complete.

2. The method of claim 1 wherein:

said supportive substrate has substantially the same crystallographic orientation as said epitaxial layer;

said bonding of said insulating layers is by combined application of heat and electrostatic pressure;

said etching of said parent layer is by a mixture of hydrofluoric, nitric and acetic acids.

3. The method of claim 1 wherein:

said parent substrate has a resistivity less than 0.02 ohm-cm; and

said epitaxial layer has a resistivity greater than 0.068 ohm-cm.

4. A method in accordance with claim 1 wherein:

said etching solution is a mixture of 49 percent by weight hydrofluoric acid, 70 percent by weight nitric acid, and 99.5 percent by weight acetic acid, in substantially the volumetric ratios of 1;

3;

8 respectively.

5. The method of claim 4 wherein:

said oxidizing agent is hydrogen peroxide; and

said electrode pair has one electrode of platinum and another of carbon.