Echo cancelling device

• US 4,007,341 A
• Filed: 05/12/1975
• Issued: 02/08/1977
• Est. Priority Date: 05/24/1974
• Status: Expired due to Term

• Current Assignee: COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS CIT-ALCATEL
• Original Assignee: COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS CIT-ALCATEL
• Inventors: Lajotte, Dominique, Sourgens, Jacques, Michelon, Francois
• Primary Examiner(s): Claffy, Kathleen H.
• Assistant Examiner(s): Myers, Randall P.
• Application Number:
  US05/576,423
• Time in Patent Office: 638 Days
• Field of Search: 179/170.2, 179/170.6, 179/170.8
• US Class Current: 379/406.11
• CPC Class Codes: H04B 3/23 using a replica of transmitted signal in the time domain, e.g. echo cancellers

Abstract

Echo canceller, canceling an echo signal y (t), generated by a signal x (t), comprising a transversal digital filter whose N weighting coefficients C_i, correlated with N coded samples of x (t) enable the forming of a synthetic echo signal y (t) and comprising an adaptive control loop adjusting the coefficients C_i, characterized in that the adaptive control loops effects the correlation between the signs of the N coded samples of x (t) and of the residual echo signal γ (t) and determines the correction Δ C_i adjusting the coefficients C_i by multiplication of the residual signal | ε (t) | by a coefficient α close to zero accompanied by the sign of the aforementioned correlation of signs.

Claims

1. Echo canceller comprising a transversal filter, to form a synthetic echo signal y (t) effecting a convolution of N samples X (t) each coded on n bits of a received signal x (t), recorded in a first memory and of N filtration weighting samples C obtained by correlation of the residual echo signal ε

(t) and of the samples X(t) and recorded in a second memory, a digital subtractor forming the residual echo signal ε

(t) coded on n bits based on the true echo signal y (t) and on the synthetic echo signal y (t), means for determining the absolute value of the residual echo signal, means for determining the sign of the variations of the weighting coefficients, and means including an adaptive control loop for adjusting the filtration weighting coefficients C from the absolute value of the said residual echo signal and from the correlation of the signs of N samples X (t) of the received signal and of the residual echo signal determining the sign of each of the variations of the filtration weighting coefficients C, said filtration weighting coefficients C in said first memory being less than 2ⁿ, and being recorded in the said second memory each on n + m bits, said adaptive control loop including a first adder having (n + m) first inputs receiving the successive filtration weighting coefficients and having (n + m) second inputs receiving the residual echo signal ε

(t) multiplied by a coefficient α

close to zero and accompanied by the sign of the correlation of the signs effected, m being the minimum number of bits necessary for representing the reverse of the coefficient α

, said second adder sending out the filtration weighting coefficients to the said second memory to which it is looped.

2. Device according to claim 1, wherein said digital subtractor sending out the residual echo signal ε

(t) on n bits is connected to the said first adder with a shift towards the right of m binary positions, effected on the n bits of the signal ε

(t), to multiply that signal ε

(t) by a coefficient α

which is then equal to 2^-m.

3. Device according to claim 1 wherein said transverse digital filter comprises a second multiplier having n first and n second inputs receiving the n bits having the heaviest weight of the weighting coefficients C and the n bits of the samples X (t) of the received signal x (t) recorded in the said first memory and sending out their product on the 2 n outputs and a digital accumulator having 2 n first inputs connected to the second multiplier and 2 n second inputs looped back on its 2 n outputs on which is sent out the said synthetic echo signal y (t), with a view to forming the said residual echo signal ε

(t) sent out exclusively on the n bits having the heaviest weight.

4. Device according to claim 3 including a logic circuit having a first set of logic gates conditioned by a detector for the threshold of the level of the echo signal combining, at the time when an echo signal lower than that threshold appears and when there is a signal x (t) and applying them to the inputs of the said first adder, the binary weights of ε

(t) effecting a multiplying of the signal ε

(t) by the coefficient α

assuming a value close to the value 2^-m chosen for α

, and having a second set of logic gates combining, at the time of the exceeding of that threshold by the echo signal and when there is x (t), all the binary weights of the signal ε

(t) on the input having the lightest weight of the first adder, effecting a multiplication of the signal ε

(t) by the coefficient assuming a new value, close to 2^-.sup.(n + m) .

5. Device according to claim 1 wherein said first multiplier of signs is formed by a logic "exclusive OR" gate.