Field inversion control for N-channel device integrated circuits
First Claim
1. A method of making an N-channel MOS integrated circuit structure comprising the steps of:
- providing a substrate of a P--type semiconductor material and forming a uniform thin oxide layer along a major surface of the substrate;
ion-implanting a P-type dopant through the oxide layer to form immediately thereunder a uniform layer of P+-type semiconductor material extending along said major substrate surface;
removing selected spaced-apart portions of the oxide layer and the underlying P+-type layer to leave a pattern of unimplanted active areas of the substrate spaced laterally by unremoved fields of oxide and underlying fields of P+-type material;
forming a uniform thin oxide layer over the active substrate areas and forming a substantially thicker oxide layer over said fields;
ion-implanting a P-type dopant through the thin oxide layer into the active substrate areas to form at said active areas layers of P-type semiconductor material whose resistivity is lower than that of the P--type substrate and higher than that of the P+-type fields; and
forming N-channel MOS devices at least at selected ones of said layers of P-type material.
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Accused Products
Abstract
The field inversion properties of integrated circuits incorporating N-channel MOS devices are improved by using a silicon substrate whose bulk dopant concentration is low, but whose local dopant concentration is high at the field surfaces under the field oxide separating the active surface areas where the individual N-channel MOS devices are formed. The differential doping between surface areas under the field oxide and the active surface areas of the substrate is done by nonselectively ion-implanting boron into the substrate to form a uniform low resistivity layer, removing selected portions of the low resistivity layer to expose the unimplanted, high resistivity substrate and forming the active devices at the unimplanted substrate portions. As an option, the unimplanted surface portion can be doped to an intermediate dopant concentration to improve performance. The remaining pattern of the low resistivity layer is covered with field oxide. The invention allows the use of relatively inexpensive, low dopant concentration substrates to conveniently manufacture high performance N-channel MOS integrated circuits.
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Citations
10 Claims
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1. A method of making an N-channel MOS integrated circuit structure comprising the steps of:
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providing a substrate of a P--type semiconductor material and forming a uniform thin oxide layer along a major surface of the substrate; ion-implanting a P-type dopant through the oxide layer to form immediately thereunder a uniform layer of P+-type semiconductor material extending along said major substrate surface; removing selected spaced-apart portions of the oxide layer and the underlying P+-type layer to leave a pattern of unimplanted active areas of the substrate spaced laterally by unremoved fields of oxide and underlying fields of P+-type material; forming a uniform thin oxide layer over the active substrate areas and forming a substantially thicker oxide layer over said fields; ion-implanting a P-type dopant through the thin oxide layer into the active substrate areas to form at said active areas layers of P-type semiconductor material whose resistivity is lower than that of the P--type substrate and higher than that of the P+-type fields; and forming N-channel MOS devices at least at selected ones of said layers of P-type material. - View Dependent Claims (2, 3)
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4. A method of making an integrated circuit structure having N-channel MOS devices disposed along a laterally extending major surface of a high bulk resistivity P-type substrate and laterally spaced from each other by low resistivity P-type surface field areas of said substrate for field inversion control, comprising the steps of:
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ion-implanting a selected P-type dopant into a laterally extending major surface of a high bulk resistivity P-type material substrate to form a laterally uniform layer of low resistivity P-type material extending along said major surface of the substrate; removing selected portions of said layer to form a pattern of active areas of unimplanted substrate surface spaced apart by a pattern of the remaining low resistivity layer portions; and forming N-channel MOS devices at least at selected ones of said active areas of the substrate, said devices being laterally spaced from each other by field areas formed by said remaining portions of the layer of low resistivity P-type material. - View Dependent Claims (5, 6)
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7. A method of making a semiconductor material structure comprising the steps of:
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providing a semiconductor material substrate of a selected conductivity type and selected resistivity, and forming along a laterally extending major surface thereof a laterally uniform semiconductor material layer of the same conductivity type but of lower resistivity; removing selected area portions of said layer to form at said substrate surface a pattern of unimplanted active substrate areas separated from each other by the unremoved portions of said layer; and forming integrated circuit components at said active substrate areas, said components being spaced from each other by fields formed by said unremoved portions of the lower resistivity layer. - View Dependent Claims (8, 9)
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10. A method of making a semiconductor material structure as in clain 7 wherein the step of forming the low resistivity layer comprises ion-implanting a selected dopant into the semiconductor material through a layer of iondiffusing material.
Specification