Computer system operation and control

• US 4,030,072 A
• Filed: 12/18/1974
• Issued: 06/14/1977
• Est. Priority Date: 12/18/1974
• Status: Expired due to Term

• Current Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Original Assignee: Xerox Corporation (Xerox Holdings Corp.)
• Inventors: Bjornsson, Eyjolf Steuart
• Primary Examiner(s): Springborn, Harvey E.
• Application Number:
  US05/534,045
• Time in Patent Office: 909 Days
• Field of Search: 340/172.5, 445/1
• US Class Current: 714/31
• CPC Class Codes: G06F 11/2236 to test CPU or processors
• CPC Class Codes: G06F 11/2736 using a dedicated service processor for test

Abstract

A data processing system includes a control processor in communication with the various devices comprising the data processing system. Communication between the control processor and the data processing system devices occurs on a separate maintenance and diagnostic bus. The control processor initiates diagnostics stored within several of the data processing system devices. The self-diagnosing devices provide an indication to the control processor of successful completion of the diagnostic stored therein. The device being diagnosed and the control processor operate asynchronously of each other and utilize a register bit to indicate successful completion of the diagnostic test.

Claims

1. A data processing system having a plurality of devices including a basic processor, memory unit and I/O processor, said devices interconnected to one another by a first group of data and address lines comprising a first electrical bus, the data processing system further comprising:

a. at least one operator console,

b. a controller connected to said operator console, said controller including a microprogrammed processor comprising;

1. a control memory for storing a programmed sequence diagnostic control words,

2. means for addressing said control memory,

3. an arithmetic and logic unit for processing said control words, and

4. addressing means connected to said arithmetic and logic unit for generating an address,

c. a second group of data and address lines comprising a second electrical bus, said second bus independent of said first bus for carrying diagnostic control signals associated with said diagnostic control words, said second bus connected to said controller,

d. one of said plurality of devices comprising;

1. diagnosing means for conducting diagnostic tests thereon, and

2.

3. of said diagnostic test on said second bus to said controller. 2. A data processing system as recited in claim 1 wherein said one of said plurality of devices and said controller operate asynchronously of each other.

4. A data processing system as recited in claim 1 wherein said diagnosing means comprises means for setting a flag to a first condition during execution of said diagnostic test and means for setting said flag to a second condition only after successful completion of said diagnostic test.

5. A data processing system as recited in claim 3 wherein said flag comprises a bit in a single clock status register, and wherein said second condition of said flag indicates successful completion of said diagnostic test to said controller.

6. A data processing system as recited in claim 4 wherein said first condition of said flag indicates to said controller correspondence between said one of said plurality of devices and said address.

7. A data processing system as recited in claim 1 wherein said controller further comprises means for ascertaining whether said address corresponds to an address of said one of said plurality of devices.

8. A data processing system as recited in claim 6 wherein:

a. said diagnosing means comprises;

1. means for setting a flag to a first condition during execution of said diagnostic test, and

2. means for setting said flag to a second condition only after completion of said diagnostic test, and

b. said ascertaining means comprises means responsive to said flag being set to said first condition.

9. A data processing system as recited in claim 1 wherein:

a. said addressing means generates an address at a first time and at a second, later time,

b. said address responsive means responds to said address at a first time for enabling said diagnosing means to be initiated by said controller, and

c. said diagnosing means of said one of said plurality of devices provides said indication of successful completion on said second bus to said controller in response to said address at said second, later time.

2. means responsive to said address generated by said addressing means;

e. said diagnosing means comprising storage means for storing procedures of said diagnostic test therein,

f. said diagnosing means initiated by a signal of said controller on said second bus and conducting said diagnostic test independently of said controller,

g. said diagnosing means providing an indication of successful completion