Inverter apparatus
First Claim
1. Inverter apparatus comprising a source of direct current, a plurality of parallel branch circuits connected across said source, each branch circuit including a pair of serially connected controllable switching elements, a plurality of semiconductor elements connected in parallel opposition with respective controllable switching elements, an alternating current load connected to the junctures between said pair of serially connected controllable switching elements, a D.C. reactor connected between said source of direct current and said alternating current load, means connected across said D.C. reactor for preventing attenuation of the current flowing through said D.C. reactor, and a source of control pulses for rendering ON respective controllable switching elements in a predetermined sequence each for a 120°
- interval of the output alternating current, said source of control pulse including means for chopping the current flowing through each controllable switching element at a predetermined modulation frequency for the former or latter 60°
interval of said 120°
interval.
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Abstract
In an inverter apparatus including a plurality of parallel branch circuits connected across a D.C. source, each including a pair of serially connected controllable switching elements, and a plurality of semiconductor elements connected in parallel opposition with respective switching elements, a D.C. reactor is connected on the D.C. side or A.C. side of the inverter and a circuit is connected across the D.C. reactor for preventing attenuation of the current flowing through the D.C. reactor during the OFF period of the switching elements. A source of control pulses is provided for rendering ON respective controllable switching elements each for a 120° interval of the output alternating current. The source of control pulse includes means for chopping the current flowing through each controllable switching element at a predetermined modulation frequency for the former or latter 60° of the 120° interval.
16 Citations
10 Claims
-
1. Inverter apparatus comprising a source of direct current, a plurality of parallel branch circuits connected across said source, each branch circuit including a pair of serially connected controllable switching elements, a plurality of semiconductor elements connected in parallel opposition with respective controllable switching elements, an alternating current load connected to the junctures between said pair of serially connected controllable switching elements, a D.C. reactor connected between said source of direct current and said alternating current load, means connected across said D.C. reactor for preventing attenuation of the current flowing through said D.C. reactor, and a source of control pulses for rendering ON respective controllable switching elements in a predetermined sequence each for a 120°
- interval of the output alternating current, said source of control pulse including means for chopping the current flowing through each controllable switching element at a predetermined modulation frequency for the former or latter 60°
interval of said 120°
interval. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
- interval of the output alternating current, said source of control pulse including means for chopping the current flowing through each controllable switching element at a predetermined modulation frequency for the former or latter 60°
-
10. The inverter apparatus according to claim 10, wherein said fourth logic circuit comprises a plurality of AND logic gates, each of said AND gates having two inputs selected from outputs a, a, b, b, c, c, of said first logic circuit and a third input selected from outputs e, f of said third logic circuit.
Specification