Bi-directional motion sensing and clocking system

• US 4,041,285 A
• Filed: 04/12/1976
• Issued: 08/09/1977
• Est. Priority Date: 04/12/1976
• Status: Expired due to Term

• Current Assignee: Nu-Metrics Incorporated Longdale Industrial Park
• Original Assignee: Pentron Industries Incorporated
• Inventors: Sampey, Harry R., Shidel, Jerome E.
• Primary Examiner(s): Wise, Edward J.
• Application Number:
  US05/675,750
• Time in Patent Office: 484 Days
• Field of Search: 235/151.3, 235/151.32, 235/150.2, 235/150.27, 324/160, 324/161, 324/181, 340/23, 340/24
• US Class Current: 701/300
• CPC Class Codes: G01S 11/02 using radio waves G01S19/00 takes precedence

Abstract

An electrical bi-directional motion sensing and clocking system is disclosed for identifying the relative sense and magnitude of movement experienced by a moving body. The corresponding relative motion of a target past a pair of sensor units produces a pair of input signal pulses from the sensors for each increment of movement experienced by the moving body. Each occurrence of such a pair of input pulses is recorded and gives rise to a clock output signal upon the recorded occurrence of both input signals. The relative occurrence sequence of the two input signals is also recorded and utilized to provide a respectively corresponding output representing the direction of body movement to be associated with the detected movement increment. The system is arranged so as to suppress spurious output signals which might otherwise be generated when the relative sequence of input signals is reversed at any arbitrary point in the cycle of detecting an increment of motion.

Claims

1. An electrical bi-directional motion sensing and clocking system for identifying the relative sense and magnitude of movement experienced by a moving body, said system comprising:

a sensor mounting means,

target means mounted for relative motion with respect to said sensor mounting means in a direction and in a magnitude corresponding to the relative direction and magnitude of movements experienced by said moving body,

a first sensor mounted on said sensor mounting means in proximity to the path of said target means and producing a first input signal in response to the passage of said target means thereby,

a second sensor also mounted on said sensor mounting means in proximity to the path of said target means and producing a second input signal in response to the passage of said target means thereby,

said first and second sensors being located relative to one another such that said first and second input signals each occur once in a first sequence for a predetermined increment of movement in a first direction by said moving body and once in a second reverse sequence for a predetermined increment of movement by the body in a second direction opposite to said first direction,

first recording means connected to said first sensor for recording the occurrence of said first input signal,

second recording means connected to said second sensor for recording the occurrence of said second input signal,

output gate means connected to said first and second recording means for producing a clock output signal upon the recorded occurrence of both said first and second input signals,

clearing means connected to said first and second recording means and to said output gate means for clearing the recorded contents of the first and second recording means upon the production of said clock output signal thereby preparing for similar processing of the next succeeding pair of first and second input signals, and

sequence recording means connected to detect whether the first input signal or the second input signal last occurred just prior to the production of said clock output signal and to provide a respectively corresponding sequence output signal representing the input signal sequence and hence direction of body movement to be associated with the increment of body movement represented by said clock output signal.

2. An electrical bi-directional motion sensing and clocking system as in claim 1 wherein said sequence recording means is connected to said first recording means and to said second recording means.

3. An electrical bi-directional motion sensing and clocking system as in claim 2 wherein said sequence recording means comprises an RS flip-flop having set and reset inputs and Q and Q outputs wherein (a) one of the set and reset inputs is connected to said first recording means, (b) the other of the set and reset inputs is connected to said second recording means, and (c) said sequence output signal is provided by one of said Q and Q outputs.

4. An electrical bi-directional motion sensing and clocking system as in claim 1 wherein said first recording means comprises:

a first bistable means connected to transition to a first output state upon the occurrence of said first input signal, and

a second bistable means connected to respond to the first output state of said first bistable means by transitioning to a first output state which is maintained and presented to said output gate means thereby recording the past occurrence of said first input signal.

5. An electrical bi-directional motion sensing and clocking system as in claim 4 wherein said first bistable means comprises an RS type flip-flop and said second bistable means comprises a JK type flip-flop.

6. An electrical bi-directional motion sensing and clocking system as in claim 4 wherein said second recording means comprises:

a third bistable means connected to transition to a first output state upon the occurrence of said second input signal, and

a fourth bistable means connected to respond to the first output state of said third bistable means by transitioning to a first output state which is maintained and presented to said output gate means thereby recording the past occurrence of said second input signal.

7. An electrical bi-directional motion sensing and clocking system as in claim 6 wherein said third bistable means comprises an RS type flip-flop and said fourth bistable means comprises a JK type flip-flop.

8. An electrical bi-directional motion sensing and clocking system as in claim 7 wherein said clearing means comprises:

input means for providing a third electrical input signal occurring subsequent to the occurrence of a pair of said first and second input signals, and

further means connected to receive said third input signal and providing, in response thereto (a) a stimulus signal to said output gate means for causing the occurrence of said clock output signal, (b) first resetting signals to said first and third bistable means, and (c) subsequent to the occurrence of said clock output signal, second resetting signal to said second and fourth bistable means.

9. An electrical bi-directional motion sensing and clocking system as in claim 8 wherein said input means comprises:

a monostable circuit means connected so as to be stimulated to an unstable output state by the sensed absence of said first and second input signals and to remain in said unstable output state for a predetermined time period, and

logic gating means connected to receive the output from said monostable circuit means and also connected so as to be stimulated by the sensed absence of said first and second input signals,

said logic gating means providing said third electrical input signal only upon the sustained absence of said first and second input signals for at least said predetermined time period thereby preventing spurious third input signals from being produced during the normal transition occurring between first and second input signals within a pair of such signals during which there may be a brief sensed absence of both the first and second input signals.

10. An electrical bi-directional motion sensing and clocking system as in claim 9 wherein said further means comprises:

a first time delay means connected to receive said third input signal and to provide said first resetting signals in response thereto after an associated predetermined time delay,

a second time delay means connected to receive an output from said first time delay means and to provide said stimulus signal in response thereto after an associated predetermined time delay, and

a third time delay means connected to receive an output from said second time delay means and to provide said second resetting signals in response thereto after an associated predetermined time delay.

11. An electrical bi-directional sensing and clocking circuit for sensing the relative occurrence sequence of at least first and second sequential and repetitive electrical input signals and for providing electrical output signals representing the sensed relative sequence and also representing the number of repetitive occurrences of pairs of said first and second input signals in the detected relative sequence without possibly producing spurious output signals when the relative sequence of the input signals is reversed, said electrical circuit comprising:

first recording means for recording the occurrence of said first input signal,

second recording means for recording the occurrence of said second input signal,

output gate means connected to said first and second recording means for producing a clock output signal upon the recorded occurrence of both said first and said second input signals,

clearing means connected to said first and second recording means and to said output gate means clearing the recorded contents of the first and second recording means upon the production of said clock output signal thereby readying the circuit to process the next succeeding pair of first and second input signals, and

sequence recording means connected to detect whether the first input signal or the second input signal last occurred just prior to the production of said clock output signal and to provide a respectively corresponding sequence output signal representing the input signal sequence to be associated with said clock output signal.

12. An electrical bi-directional sensing and clocking circuit as in claim 11 wherein said sequence recording means is connected to said first recording means and to said second recording means.

13. An electrical bi-directional motion sensing and clocking circuit as in claim 12 wherein said sequence recording means comprises an RS flip-flop having set and reset inputs and Q and Q outputs wherein (a) one of the set and reset inputs is connected to said first recording means, (b) the other of the set and reset inputs is connected to said second recording means, and (c) said sequence output signal is provided by one of said Q and Q outputs.

14. An electrical bi-directional motion sensing and clocking circuit as in claim 11 wherein said first recording means comprises:

a first bistable means connected to transition to a first output state upon the occurrence of said first input signal, and

a second bistable means connected to respond to the first output state of said first bistable means by transitioning to a first output state which is maintained and presented to said output gate means thereby recording the past occurrence of said first input signal.

15. An electrical bi-directional motion sensing and clocking circuit as in claim 14 wherein said first bistable means comprises an RS type flip-flop and said second bistable means comprises a JK type flip-flop.

16. An electrical bi-directional sensing and clocking circuit as in claim 14 wherein said second recording means comprises:

a third bistable means connected to transition to a first output state upon the occurrence of said second input signal, and

a fourth bistable means connected to respond to the first output state of said third bistable means by transitioning to a first output state which is maintained and presented to said output gate means thereby recording the past occurrence of said second input signal.

17. An electrical bi-directional motion sensing and clocking circuit as in claim 16 wherein said third bistable means comprises an RS type flip-flop and said fourth bistable means comprises a JK type flip-flop.

18. An electrical bi-directional motion sensing and clocking circuit as in claim 17 wherein said clearing means comprises:

input means for providing a third electrical input signal occurring subsequent to the occurrence of a pair of said first and second input signals, and

further means connected to receive said third input signal and providing, in response thereto (a) a stimulus signal to said output gate means for causing the occurrence of said clock output signal, (b) first resetting signals to said first and third bistable means, and (c) subsequent to the occurrence of said clock output signal, second resetting signal to said second and fourth bistable means.

19. An electrical bi-directional sensing and clocking circuit as in claim 18 wherein said input means comprises:

a monostable circuit means connected so as to be stimulated to an unstable output state by the sensed absence of said first and second input signals and to remain in said unstable output state for a predetermined time period, and

logic gating means connected to receive the output from said monostable circuit means and also connected so as to be stimulated by the sensed absence of said first and second input signals,

said logic gating means providing said third electrical input signal only upon the sustained absence of said first and second input signals for at least said predetermined time period thereby preventing spurious third input signals from being produced during the normal transition occurring between first and second input signals within a pair of such signals during which there may be a brief sensed absence of both the first and second input signals.

20. An electrical bi-directional motion sensing and clocking circuit as in claim 19 wherein said further means comprises:

a first time delay means connected to receive said third input signal and to provide said first resetting signals in response thereto after an associated predetermined time delay,

a second time delay means connected to receive an output from said first time delay means and to provide said stimulus signal in response thereto after an associated predetermined time delay, and

a third time delay means connected to receive an output from said second time delay means and to provide said second resetting signals in response thereto after an associated predetermined time delay.