Multilevel metallization process
First Claim
1. A method of making a multilevel conductor pattern for a semiconductor device comprising:
- depositing a first level aluminum layer on a semiconductor substrate;
anodizing said first level aluminum to form a porous alumina layer on the top surface thereof;
anodizing said first level aluminum layer to form a barrier alumina layer subjacent to the porous alumina layer;
masking desired first level conductor sites with a resist;
etching both of the alumina layers down to the first level aluminum layer except in the conductor site areas protected by the resist;
anodizing the first level aluminum layer to convert it to nonconductive alumina except in the conductor site areas protected by the resist and the remaining barrier alumina layer;
removing the resist;
forming an insulating layer over the first level aluminum layer;
etching an opening through the insulating area, porous alumina layer, and barrier alumina layer, respectively, to expose a portion of the first level aluminum which has not been anodized and is still conductive; and
depositing a second level aluminum layer on the insulating layer, with the second level aluminum contacting the unanodized portion of the first level aluminum through the opening.
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Accused Products
Abstract
A method of making a multilevel conductor pattern for a semiconductor device. An aluminum layer on the substrate surface provides a situs for first level conductors. Successive soft and hard anodization steps are advantageously used to provide excellent intralevel isolation and interlevel electrical connection in desired areas. First level conductor sites are masked and the two anodized films are selectively removed in the desired nonconductive areas. The remaining first level aluminum is completely anodized. An insulating layer is then deposited and vias are formed therethrough to connect a subsequently deposited second level metallization layer with the conductor sites.
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Citations
4 Claims
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1. A method of making a multilevel conductor pattern for a semiconductor device comprising:
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depositing a first level aluminum layer on a semiconductor substrate; anodizing said first level aluminum to form a porous alumina layer on the top surface thereof; anodizing said first level aluminum layer to form a barrier alumina layer subjacent to the porous alumina layer; masking desired first level conductor sites with a resist; etching both of the alumina layers down to the first level aluminum layer except in the conductor site areas protected by the resist; anodizing the first level aluminum layer to convert it to nonconductive alumina except in the conductor site areas protected by the resist and the remaining barrier alumina layer; removing the resist; forming an insulating layer over the first level aluminum layer; etching an opening through the insulating area, porous alumina layer, and barrier alumina layer, respectively, to expose a portion of the first level aluminum which has not been anodized and is still conductive; and depositing a second level aluminum layer on the insulating layer, with the second level aluminum contacting the unanodized portion of the first level aluminum through the opening. - View Dependent Claims (2, 3, 4)
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Specification