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System for combining analog and image signals into a standard video format

  • US 4,045,815 A
  • Filed: 02/04/1976
  • Issued: 08/30/1977
  • Est. Priority Date: 02/04/1976
  • Status: Expired due to Term
First Claim
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1. A system for combining at least one analog signal with video signals comprising:

  • an analog-to-digital converter having an analog signal input means and an enabling signal input means;

    a random access memory having a data input means coupled to said analog-to-digital for receiving its digital output, said random access memory having a write input means, a row address input means and a column address input means;

    a controlled gate circuit means having its data signal input means coupled to said random access memory for receiving its output, said gate circuit means having a control signal input means;

    a source of vertical and horizontal sync signals;

    first multivibrator means, second multivibrator means and third multivibrator means;

    means coupling vertical sync signals from said source to said enabling signal input means of said analog-to-digital converter for enabling same upon occurrence of each vertical sync signal;

    means coupling vertical sync signals from said source to an input of said first multivibrator means, said write input means of said random access memory being coupled to said first multivibrator means;

    a first counter means having an enable input means, a clock input means and a reset input means, means for coupling vertical sync signals from said source to said reset input of said first counter means, means for coupling horizontal sync signals from said source to said clock input means of said first counter means, and means for coupling said enable input means of said first counter means to an output of said second multivibrator means, said second multivibrator means having its input means coupled to said source for receiving horizontal sync signals therefrom, and said row address input means of said random access memory being coupled to said first counter means for receiving its output signals;

    oscillator means;

    a second counter means having a clock input means coupled to said oscillator means for receiving output signals therefrom and having reset input means coupled to said third multivibrator means for receiving output signals therefrom, said third multivibrator means having its input means coupled to said source for receiving vertical sync signals therefrom, and said column address input means of said random access memory being coupled to said second counter means for receiving its output signals;

    logic circuit means having a first input coupled to said third multivibrator means for receiving its output signals and having a second input coupled to said second multivibrator means for receiving its output signals, said logic circuit having its output coupled to said control signal input means of said gate circuit means for enabling said gate circuit;

    an additional source supplying video signals; and

    means coupled to said additional source and to said gate circuit means for combining signals therefrom.

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