Data handling systems
First Claim
1. A date handling system comprisinga scanning means for scanning a number of analogue signals from independent input lines, cycliclya test signal injection means by which test signals are interleaved between at least two of said number of analogue signals,an analogue to digital converter means receiving said analogue signals and said test signals and delivering equivalent digital output signals,a primary measurement shift register (PMR) connected to receive said digital output signals and operable to overwrite or recycle said digital signals after each complete scan made by the scanning means with freshly scanned signals,signal extraction means for extracting signals from the shift register (PMR),comparator means for receiving extracted signals and comparing them with stored threshold data to yield a binary 1 or 0 according to the value of each extracted signal relative to said threshold data,a primary status register (PSR) in which the digital bits yielded by the comparator means are assembled as a binary word in which the positions of bits are advanced by one space on each cycle of the scanning means anda majority voting circuit responsive to a majority m out of n status bits indicating an out of tolerance condition.
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Abstract
A data handling system receives analogue signals on a number of input lines by scanning the lines continually. The input signals are set into a register and after each scan their positions shifted by one place. A/D converters produce digital signals from these and a computer compares the digital signals with stored threshold data to yield a status binary 1 or 0 according to whether the inputs are inside or outside the threshold. Test signals are interleaved with the analogue signals. The status signals are assembled in a register and continuously recycled so that a constant stuck at 1 or stuck at O defect is at once recognized. The input lines are replicated and a majority vote is taken before any actuator is exercised.
8 Citations
6 Claims
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1. A date handling system comprising
a scanning means for scanning a number of analogue signals from independent input lines, cyclicly a test signal injection means by which test signals are interleaved between at least two of said number of analogue signals, an analogue to digital converter means receiving said analogue signals and said test signals and delivering equivalent digital output signals, a primary measurement shift register (PMR) connected to receive said digital output signals and operable to overwrite or recycle said digital signals after each complete scan made by the scanning means with freshly scanned signals, signal extraction means for extracting signals from the shift register (PMR), comparator means for receiving extracted signals and comparing them with stored threshold data to yield a binary 1 or 0 according to the value of each extracted signal relative to said threshold data, a primary status register (PSR) in which the digital bits yielded by the comparator means are assembled as a binary word in which the positions of bits are advanced by one space on each cycle of the scanning means and a majority voting circuit responsive to a majority m out of n status bits indicating an out of tolerance condition.
Specification
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- Resources
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Current AssigneeUnited Kingdom Atomic Energy Authority
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Original AssigneeUnited Kingdom Atomic Energy Authority
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InventorsKeats, Albert Brian
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Primary Examiner(s)Atkinson, Charles E.
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Application NumberUS05/708,020Time in Patent Office417 DaysField of Search235/153 A, 235/153 AE, 235/153 AC, 340/347 AD, 340/146.1 BEUS Class Current714/797CPC Class CodesG05B 23/0291 Switching into safety or de...G05B 9/03 with multiple-channel loop,...
