Digital radar signal processor
First Claim
1. A digital signal processor for use with a radar receiver, comprising:
- an adaptive constant false alarm threshold loop connected to receive signal returns from said radar receiver for producing a signal indicative of a target,memory means connected to receive said signal indicative of a target for storing said signal and updating said signal in accordance with successive signals indicative of a target and producing a digital word indicative of said target,an adaptive background average threshold loop connected to receive said digital word indicative of said target for comparing said word with selected words which precede and follow said word in time and for producing an output signal declaring a target if said word exceeds said selected words,a track signal processor having a first input connected to a track loop signal and a second input connected to receive said output signal from said adaptive background average threshold loop for providing digital range and velocity signals, andan error word generator connected to receive said digital range and velocity signals from said track signal processor for producing an error word signal which is fed back to said first input of said track signal processor for closing a track signal loop.
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Abstract
A radar signal processor employs digital circuits to provide two adaptive resholds which act to reject clutter and noise. A digital constant false alarm unit serves to set the first threshold level by comparing an expected false alarm number with a number of noise pulses occurring in a noise gate generated during the radar dead time. The second threshold is set by establishing a background average. The existence of a target in a particular range cell in relation to the second threshold is determined by comparing its hit count with the hit counts of two range cells proximately following it and the two range cells proximately preceding it. A target is automatically acquired in range and velocity by using a memory unit and constructing a velocity-range matrix which identifies range and velocity by pattern recognition techniques.
50 Citations
9 Claims
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1. A digital signal processor for use with a radar receiver, comprising:
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an adaptive constant false alarm threshold loop connected to receive signal returns from said radar receiver for producing a signal indicative of a target, memory means connected to receive said signal indicative of a target for storing said signal and updating said signal in accordance with successive signals indicative of a target and producing a digital word indicative of said target, an adaptive background average threshold loop connected to receive said digital word indicative of said target for comparing said word with selected words which precede and follow said word in time and for producing an output signal declaring a target if said word exceeds said selected words, a track signal processor having a first input connected to a track loop signal and a second input connected to receive said output signal from said adaptive background average threshold loop for providing digital range and velocity signals, and an error word generator connected to receive said digital range and velocity signals from said track signal processor for producing an error word signal which is fed back to said first input of said track signal processor for closing a track signal loop. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A signal processor for use with a radar receiver receiving signals containing noise pulses, said signal processor, comprising:
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constant false alarm rate averaging means connected to receive said radar signals from said receiver for counting said noise pulses occurring in a selected time period and producing an output n-word signal when said pulses exceed a selected number, memory means having a first input connected to receive said output n-word signals from said constant false alarm rate averaging means for storing and updating a selected number of said output n-word signals and producing an output signal when said selected number of n-word signals has been exceeded, slope summing means connected to receive said output signals from said memory means for producing a current slope summed output signal therefrom, background sum adder means connected to said slope summing means for combining prior and subsequent slope summed output signals and decoder means connected to said background sum adder means for generating a background sum-related threshold value, m, second threshold means having a first input connected to receive said current slope summed output signal from said slope summing means and a second input to receive said background sum-related threshold for producing an output m-word signal when said first input signal exceeds said second input signal, and tracking signal processing means connected to receive said output m-word signal from said second threshold means for correcting any errors contained in said output m-word signal. - View Dependent Claims (8, 9)
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Specification