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Digital load control circuit and method for power monitoring and limiting system

  • US 4,064,485 A
  • Filed: 07/22/1976
  • Issued: 12/20/1977
  • Est. Priority Date: 07/22/1976
  • Status: Expired due to Term
First Claim
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1. A circuit for controlling the the "on/off" states of each of a plurality of electrical loads in response to power monitoring and signal generating circuit means that monitors the electrical power delivered to the "on" loads and produces an add control signal commanding the addition of one or more of the loads when power consumption is to be increased and produces a shed control signal commanding the shedding of one or more of said plurality of loads when such power consumption is to be decreased, comprising:

  • a plurality of individually addressable load control latch means, each having a load-off state and a load-on state, said plurality of load control latch means having a common data input means to which each of said load control latch means is individually responsive when it is addressed, each of said plurality of loads being adapted for control by a separate one of said load control latch means so that when each of said latch means is in its load-off state the load controlled thereby is "off", and when each of said latch means is in its load-on state, the load controlled thereby is "on";

    address generating means for generating a succession of address signals, each such signal being effective to address a separate one of said plurality of load control latch means;

    multiplexing means responsive to said succession of address signals produced by said address generator means so as to be synchronously operated with the addressing of said load control latch means, said multiplexing means having a plurality of inputs each of which is connected to a separate one of said plurality of load control latch means, said multiplexing means having a common output at which a signal is produced indicating the state of that one of said load control latch means then being addressed by said counter means;

    add detection logic circuit means for detecting concurrence of a first set of conditions comprising the occurrence of the add control signal and the occurrence of a signal at said output of said multiplexing means indicating that the one of said load control latch means then being addressed is in its load-off state;

    shed logic detection means for detecting concurrence of a second set of conditions comprising the occurrence of the shed control signal and a signal at said output of said multiplexing means indicating that the one of said load control latch means then being addressed is in its load-on state; and

    means connecting said add logic detection means and said shed logic detection means to said data input means of said plurality of load control latch means for responding to the detection by said add logic detection means of the concurrence of said first set of conditions to switch that one of said load control latch means then being addressed to said load-on state, and for responding to the detection by said shed logic detection means of the concurrence of said second set of conditions to switch that one of said load control latch means then being addressed to said load-off state.

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