CCD focal plane processor for moving target imaging

• US 4,064,533 A
• Filed: 10/24/1975
• Issued: 12/20/1977
• Est. Priority Date: 10/24/1975
• Status: Expired due to Term

• Current Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Original Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Inventors: White, Marvin Hart, Lampe, Donald Ross
• Primary Examiner(s): Martin, John C.
• Assistant Examiner(s): Psitos, Aristotelis M.
• Application Number:
  US05/625,702
• Time in Patent Office: 788 Days
• Field of Search: 178/DIG. 33, 178/DIG. 38, 178/7.1, 357/24, 357/30, 250/578, 250/332, 250/370, 358/105, 358/113, 358/213, 307/221 D, 307/221 C
• US Class Current: 348/25
• CPC Class Codes: G01S 11/12 using electromagnetic waves other than radio waves
• CPC Class Codes: G01S 13/538 eliminating objects that have not moved between successive antenna scans, e.g. area MTi
• CPC Class Codes: H01L 27/1057 comprising charge coupled devices [CCD] or charge injection devices [CID]
• CPC Class Codes: H01L 27/14881 of the hybrid type
• CPC Class Codes: H04N 25/73 using interline transfer [IT]
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20

Abstract

A CCD focal plane processor having a plurality of columns of individual sensor elements with plural sensor elements per column. The structure includes plural CCD shift registers corresponding to the number of columns of sensors, each CCD shift register including a pair of stages corresponding to each of the element sensors of the corresponding column of the array. Two "snapshots" of the scene are taken at time-displaced intervals and are compared to detect differences therebetween to eliminate background, or unchanging scene content. The individual sensors provide outputs which are injected into the α stages of the corresponding paired shift register stages of each CCD shift register in a first time interval corresponding to the first "snapshot". The resulting charge packets in the first (α) stages then are advanced to the second (β) stages of each shift register pair. The second "snapshot" corresponds to injecting a second signal into the α stages of the plurality of pairs of α, β stages. The CCD shift registers then are read out simultaneously and in succession as to the plural, related α, β pairs of stages containing the time-displaced elemental signal samples. A further CCD shift register including a number of α, β pairs of stages receives the parallel α, β outputs in corresponding time sequential manner to maintain the α, β related pair arrangement of the time-displaced elemental samples. An output circuit compares the α, β signals for each elemental area and determines the difference therebetween. A CRT display receives the difference signal outputs for displaying moving target information.

Claims

1. A focal plane processor for moving target imaging for detecting a moving target in a scene having fixed background information, comprising:

a sensor array comprising plural rows and columns of sensor elements,

charge transfer devices comprising a plurality of pairs of stages respectively corresponding to said plurality of sensor elements and arranged in corresponding rows and columns with the columns thereof each arranged as a shift register for propagation of charges through the successive stages of the successive pairs,

a plurality of charge injectors respectively corresponding to said sensor elements and said pairs of stages, each operable for injecting a charge packet into the first stage in a first time interval and for injecting a second charge into said first stage in a second time interval while said first charge packet is advanced to said second stage,

control means for generating clocking voltages for effecting propagation of charges through said columns of shift register stages at a predetermined shift cycle rate, and generating control signals for controlling the sampling of the output signals of said sensor elements at desired first and second time intervals to effect injection of the said first and second, pair-related charge packets corresponding to first and second time-related samples of the respectively associated sensor element output signals into said successive stages of each pair corresponding to each said sensor element, and

said control means generating said clocking signals to advance said pair-related first and second charge packets corresponding to each said sensor element to a final stage of each of said columns of shift registers, and

a further charge transfer device shift register having a plurality of pairs of stages respectively corresponding to said columns of shift registers, each pair receiving in the first stage thereof an output charge packet from the final stage of the corresponding column shift register and

said control means controlling said further charge transfer device shift register to receive said pair-related first and second charge packets in row-by-row succession for all said row-related pairs of all said columns, and for shifting said pairs of first and second charge packets of each said row through said succession stages of said further shift register to the final stage thereof, and

means responsive in succession to said first and second time-related charge packets of each of said successive pairs as shifted to said final stage to produce corresponding first and second output sample voltages, and

analog circuit means responsive to the first and second output samples corresponding to the first and second charge packets of each said related pair of each said successive row to store said first sample and to compare said second time-related sample of the pair therewith and determine the difference therebetween, and to supply said difference as the output signal from said array.

2. A processor as recited in claim 1 wherein there is provided means for displaying any moving target in the scene to which the sensor array is exposed, including means for scanning a plurality of successive, displaced rows of said display means in synchronism with the rate of propagation of successive rows of said related pairs of first and second charge packets through said further shift register, and means receiving the output signal of said array for modulating the intensity of said display.

3. A processor as recited in claim 1 wherein each said stabilized charge injector includes a diffusion acting alternately as a source and drain of carriers of a charge packet to be injected, and, in succession, a first electrode, a first gate electrode, a second electrode of substantial area forming a large capacitance and a second gate electrode and a third gate electrode, and

said control means selectively renders said electrodes attractive and repulsive to the carriers to be injected,

in response to said control means, said diffusion operates as a source of carriers and said first gate and second electrode are rendered attractive in succession to refill the potential well defined by said first gate and said second electrode with said charge carriers and said diffusion then operates as a drain to remove excess carriers in a scupper operation, said gate electrode remaining repulsive and

in sequence, said second gate electrode is rendered attractive and said first electrode, said second electrode, and said third gate electrode then are rendered repulsive for injecting charges into said associated stage of said charge transfer device.

4. A processor as recited in claim 1 wherein:

each said stabilized charge injector includes a diffusion acting alternately as a source and drain of carriers of a charge packet to be injected

said plurality of stabilized charge injectors are disposed in side-by-side relationship on a common substrate with said charge transfer device for effecting parallel injection of charges into respectively associated stages of said charge transfer device,

means are deposited on said substrate to electrically isolate adjacent said parallel charge injectors,

each said stage of said charge transfer device includes a group of plural electrodes of the same number per group and operable under control of clocking potentials from said control means to propagate a charge through each said stage and through successive stages of said charge transfer device, and

said control means selectively renders said electrodes attractive and repulsive to the carriers to be injected,

in response to said control means, said diffusion operates as a source of carriers and said first gate and second electrode are rendered attractive in succession to refill the potential well defined by said first gate and said second electrode with said charge carriers and said diffusion then operates as a drain to remove excess carriers in a scupper operation, said gate electrode remaining repulsive and

in sequence, said second gate electrode is rendered attractive and said first electrode, said second electrode, and said third gate electrode then are rendered repulsive for injecting charges into said associated stage of said charge transfer device.

5. A focal plane processor for moving target imaging for detecting the presence of a moving target in a fixed scene, comprising:

a two-dimensional sensor array including a plurality of column sensor elements, each column including plural sensor elements with the corresponding sensor elements of the plurality of columns defining corresponding rows, said sensor being exposed to said scene and each sensor element being responsive to an elemental portion of said scene and producing an output responsive to the information content of said elemental portion of said scene,

plural columns of charge transfer devices corresponding to said columns of sensor elements and each column including a plurality of successive stages related as pairs, each said pair being associated with a respectively corresponding one of said sensor elements,

control means for propagating charge packets through said successive stages of each said column charge transfer device, in synchronism for all said columns thereof, at a predetermined shift cycle rate establishing a predetermined time duration between propagation of said charge packets through successive said stages of the corresponding column charge transfer devices,

a plurality of charge injectors respectively associated with said plural pairs of stages, each charge injector receiving a sample of the sensor signal output from the respectively associated sensor and injecting a corresponding charge packet into said first stage of the respectively associated pair of stages, at first and second, displaced times, the rate thereof independent of said shift cycle rate,

said control means generating control signals for selectively controlling the injection of corresponding charge packets by said plurality of injection means into the respectively corresponding first stages of said associated pairs of stages of said corresponding columns of charge transfer devices, in accordance with desired, time-displaced intervals of said sampling of the outputs of said sensor elements, said control means being selectively operable to initiate said first sampling and controlling said charge injectors and the associated first stages of said pairs of stages of said charge transfer devices, to inject and maintain charges corresponding to said sensor elemental signals at said first time interval and for selectively enabling the initiation of said second sampling and, in timed relation thereto, completing a shift of the charge packet in said first stage of the related stages of each said pair to said second stage while enabling the injection of a successive charge packet corresponding to the sensor element sample at said second time interval into said first stage, and thereafter clocking said column transfer devices to propagate said charge packets corresponding to each said first and second time-displaced sensor signals through said successive stages of said column shift registers at said predetermined shift cycle rate, simultaneously for all of said stages of all of said columns of charge transfer devices, thereby maintaining said first and second charge packets corresponding to said first and second time-displaced sensor element signal samples in paired relationship for propagation to an output stage of each of said columnar charge transfer devices, and

a further charge transfer device having a plurality of successive stages related as pairs, each said pair respectively corresponding to one of said column charge transfer devices for receiving into the first stage of each said pair, a charge packet injection corresponding to the charge packet propagating through the output stage of the respectively corresponding column charge transfer device, and

said control means controlling said further charge transfer device to receive said successive charge packets of a related pair from the output stages of said column charge transfer devices in time sequence at a predetermined shift cycle rate, and then controlling said further charge transfer device to propagate all said pair related charge packets therein to an output stage of said further charge transfer device prior to receiving further charge packets propagating from said output stages of said column charge transfer devices and comprising a first of a related, successive pair of said charge packets, and

means for sampling, from an output stage of said further charge transfer device, first and second output signal samples corresponding to said first and second pair-related charge packets at said cyclic shift rate of said further charge transfer device, and, for each said related pair, storing a value corresponding to said first time output sample for comparing with the value of said second time output sample and determining the difference therebetween, said difference signals thereby representing the presence of a moving scene.

6. A processor as recited in claim 5 wherein said charge transfer device each include a plurality of electrodes for each stage and each said charge injector includes a diffusion and gates, said control means controlling the potential condition of said diffusion and said gates to initiate said first injection corresponding to said first time-displaced sensor signal sample and controlling said gates and said electrodes of the first stage of the associated pair of stages for each said injector to receive and store the charge packet corresponding to said first sensor signal sample in said associated stage, and enabling said second time interval sampling to initiate said second time-interval injection while initiating a single serial shift of said first charge packet to said pair-related second stage and thereafter initiating serial readout of each of said first and second charge packets through said successive stages of each of said column charge transfer devices.

7. A processor for moving target imaging of a sensed scene comprising at least one elemental area, and including:

a charge transfer device including at least two stages, a first of said stages having an injector;

sensor means connected to said injector corresponding to said at least one elemental area for producing an output signal in proportion to the information content of said elemental area of the sensed scene, a change of information content in said elemental area indicating movement in the sensed scene,

control means for selectively producing clocking signals to advance charge packets through said at least two pair-related stages in succession and for supplying control signals to said injector to enable injection of a charge packet into the the first of said related pair of stages, said control means being selectively rendered operable to initiate said first sampling of said sensor output by enabling said injector to develop a charge packet corresponding to the level of that said first sample of said sensor output, said control means producing control signals for said injector and a first sequence of clocking signals for said first of said pair-related stages to enable the injection of said first charge packet by said injector means into said first associated stage, and

said control means being selectively operable to generate a second sequence of said control signals upon initiating a second sampling of said sensor output to cause said injector to inject a corresponding second charge packet into said associated first stage while propagating said first charge packet to said second stage of said associated pair, and thereafter to generate said clocking signals at a predetermined shift cycle rate to propagate said first and second charge packets through said successive stages.

8. A processor as recited in claim 7 wherein there are provided at least plural said pairs of related first and second stages and plural sensor elements respectively associated with each of said pairs of stages, said control means simultaneously controlling said plurality of injectors and stages in accordance with said first and second samplings and first and second parallel injections, said single serial shift and said serial readout of said successive stages.

9. A processor as recited in claim 8 wherein there are provided at least plural columns of sensor elements and pairs of shift stages and associated injectors, said control means simultaneously controlling all of said plurality thereof.

10. A system as recited in claim 9 wherein there is further provided:

a means for displaying said imaged moving target, including means for scanning successive rows of said display means at a rate corresponding to the rate of transfer of all of said charge packets through said further charge transfer device, and means responsive to said output signal from said analog circuit means for controlling the intensity of said display in proportion thereto.