Insulated-gate thin film transistor with low leakage current

• US 4,065,781 A
• Filed: 06/21/1974
• Issued: 12/27/1977
• Est. Priority Date: 06/21/1974
• Status: Expired due to Term

• Current Assignee: Townsend and Townsend and Crew LLP (Kilpatrick Townsend & Stockton LLP)
• Original Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Inventors: Gutknecht, Peter
• Primary Examiner(s): Larkins, William D.
• Application Number:
  US05/481,729
• Time in Patent Office: 1,285 Days
• Field of Search: 357/4, 357/15, 357/23, 357/41, 357/16
• US Class Current: 257/66
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 29/205 in different semiconductor regions , e.g. heterojunctions
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/47 Schottky barrier electrodes H01L29/435 takes precedence
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/786 Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous

Abstract

An insulated-gate thin film transistor is provided with low leakage drain current. A second semiconductor layer makes contact with the source electrode and the semiconductor layer forming the channel of the transistor at least between the source and drain electrodes. The second semiconductor layer is of opposite type conductivity from the channel semiconductor layer and preferably forms a PN heterojunction with the channel semiconductor layer. Alternatively, a metal layer may be used in place of the second semiconductor to form a Schottky-barrier junction with the channel semiconductor layer instead of a PN junction. Preferably, the channel semiconductor layer and the second semiconductor layer or the metal layer are sequentially evaporation deposited through the same deposition mask onto a substrate from evaporant sources spaced substantially different distances from the substrate so that the sequential layers are deposited on first and second overlapping areas of the substrate.

Claims

1. An insulated-gate thin film transistor comprising:

A. a substrate having opposed major surfaces and including electrically insulating material adjoining at least part of one major surface;

B. a conductor layer of an electrically conductive material disposed on at least one major surface of the substrate adjoining an electrically insulating material to form a gate electrode;

C. an insulator layer of an electrically insulating material disposed on the conductor layer;

D. source and drain electrodes of electrically conductive material disposed on the insulator layer, said source and drain electrodes being spaced away from each other;

E. a first thin semiconductor layer of semiconductor material in contact with said source and drain electrodes and in contact with said insulator layer at least between said source and drain electrodes; and

F. a second thin semiconductor layer of semiconductor material in contact with the source electrode without contacting said drain electrode and in contact with said first semiconductor layer at least between said source and drain electrodes, said second semiconductor layer being of the opposite type conductivity from the first semiconductor layer and forming a PN junction with said first semiconductor layer between the source and drain electrodes.

2. An insulated-gate thin film transistor as set forth in claim 1 wherein:

the substrate is formed entirely of an electrically insulating material, and the insulator layer covers the conductor layer.

3. An insulated-gate thin film transistor as set forth in claim 1 wherein:

the second thin semiconductor layer forms a hetero-junction with the first thin semiconductor layer.

4. An insulated-gate thin film transistor comprising:

A. a substrate having opposed major surfaces and including electrically insulating material adjoining at least a part of one major surface;

B. a conductor layer of an electrically conductive material on at least one major surface of the substrate adjoining an electrically insulating material to form a gate electrode;

C. an insulator layer of an electrically insulating and thermally conductive material disposed on the conductor layer;

D. source and drain electrodes of electrically conductive material disposed on said insulator layer, said source and drain electrodes being spaced apart from each other;

E. a thin semiconductor layer of semiconductor material in contact with the source and drain electrodes and in contact with the insulator layer at least between the source and drain electrodes; and

F. a metal layer in contact with the source electrode without contacting said drain electrode and in contact with said semiconductor layer at least between said source and drain electrodes, said metal layer of a material forming a Schottky-barrier junction with said semiconductor layer at least between the source and drain electrodes.

5. An insulated-gate thin film transistor as set forth in claim 4 wherein:

the substrate is formed entirely of an electrically insulating material, and the insulator layer covers the conductor layer.

6. An insulated-gate thin film transistor comprising:

A. a substrate having opposed major surfaces and including an electrically insulating material adjoining at least part of one said major surface;

B. a first thin semiconductor layer of semiconductor material disposed on at least one major surface of the substrate adjoining electrically insulating material;

C. a second thin semiconductor layer of semiconductor material disposed on the first semiconductor layer, said semiconductor layer being of an opposite type conductivity from the first semiconductor layer and forming a PN junction with the first semiconductor layer;

D. source and drain electrodes of electrically conductive material disposed in contact with the second semiconductor layer, said source and drain electrodes being spaced apart from each other, and said source electrode also being in contact with the first semiconductor layer without said first semiconductor layer contacting said drain electrode;

E. an insulator layer of an electrically insulating material in contact with said source and drain electrodes and the second semiconductor layer at least between the source and drain electrodes; and

F. a conductor layer of electrically conductive material disposed on the insulator layer at least between the source and drain electrodes to form a gate electrode.

7. An insulated-gate thin film transistor as set forth in claim 6 wherein:

the second thin semiconductor layer forms a heterojunction with the first thin semiconductor layer.

8. An insulated-gate thin film transistor comprising:

A. a substrate having opposed major surfaces and including electrically insulating material adjoining at least part of one of said major surface;

B. a layer of electrically conductive material disposed on at least one major surface of the substrate adjoining an electrically insulating material;

C. a thin semiconductor layer of semiconductor material disposed on the metal layer, said semiconductor layer forming a Schottky-barrier junction with said metal layer;

D. source and drain electrodes of electrically conductive material disposed on the semiconductor layer, said source and drain electrodes being spaced away from each other, and said source electrode also being in contact with said metal layer without said metal layer contacting said drain electrode;

E. an insulator layer of an electrically insulating material in contact with said source and drain electrodes and the semiconductor layer at least between the source and drain electrodes; and

F. a conductor layer of electrically conductive material disposed on the insulator layer at least between the source and drain electrodes to form a gate electrode.