Automatic peaking control circuitry for a video processing system

• US 4,069,505 A
• Filed: 01/19/1977
• Issued: 01/17/1978
• Est. Priority Date: 01/19/1977
• Status: Expired due to Term

• Current Assignee: Philips Electronicsnorth America Corporation (Koninklijke Philips N.V.)
• Original Assignee: GTE Sylvania Incorporated (Ams-Osram AG)
• Inventors: Burdick, Kenneth J., Wheeler, Robert C., Hand, Wilfred L., Wolfe, Paul G.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Psitos, Aristotelis M.
• Application Number:
  US05/760,366
• Time in Patent Office: 363 Days
• Field of Search: 358/162, 358/166, 358/174, 307/296
• US Class Current: 348/625
• CPC Class Codes: H04N 5/205 for correcting amplitude versus frequency characteristic

Abstract

A video processing system for a television receiver is shown. The video processing system includes a gain controlled stage through which a video signal is coupled. The gain of the stage is controlled to provide contrast control of the video signal. The video signal is also applied to an aperture correction circuit which develops an aperture correction signal including a pre-shoot transient responses. The aperture correction signal is also coupled through the gain controlled stage so that it is amplified or attenuated by the same amount as the video signal. An automatic peaking control circuit receives the pre-shoot and over-shoot signals to generate an automatic control signal to control the gain of the aperture correction circuit. A tracking control circuit causes the automatic peaking control circuit to accurately track the setting of an adjustable control which controls the gain of the aperture correction circuit. The output of the gain controlled stage is coupled to an output stage where the black level of the video signal is controlled by a black level control circuit. The disclosed video processing system is further adapted for fabrication in integrated circuit form.

Claims

1. Automatic peaking control circuitry for a video processing system having an aperture correction stage for generating pre-shoot and over-shoot signals comprising:

bias means for providing an adjustable gain control signal to said aperture correction stage;

detecting means connected to said aperture correction stage for detecting the amplitude of said pre-shoot and over-shoot signals in excess of a predetermined threshold; and

gain control means connected to said detecting means and to said bias means for automatically controlling the gain of said aperture correction stage to track said adjustable gain control signal.

2. Automatic peaking control circuitry as defined in claim 1 wherein said detecting means includes tracking control means connected to said bias means for varying said predetermined threshold in response to adjustment of said bias means.

3. Automatic peaking control circuitry as defined in claim 2 wherein said aperture correction stage provides a differential signal;

said detecting means includes a differential amplifier connected to said aperture correction stage for receiving said differential signal, said differential amplifier having first and second transistors with collector resistors having different magnitudes for developing a differential off-set voltage; and

said means for detecting further includes a third transistor connected to said differential amplifier and biased to conduct when said pre-shoot and over-shoot signals exceed a predetermined amplitude sufficient to overcome said differential off-set voltage.

4. Automatic peaking control circuitry as defined in claim 3 wherein said tracking control means includes first and second current multipliers connected to said differential amplifier and to said third transistor, respectively, for multiplying the current from said bias means by relatively constant multiplication factors.

5. Automatic peaking control circuitry as defined in claim 4 wherein said tracking control means includes a reference diode connected to said bias means, said first current multiplier includes a first controlled transistor connected to said reference diode for providing a current to said differential amplifier equal to the current through said diode multiplied by a substantially constant multiplication factor, and said second current multiplier includes a second controlled transistor connected to said reference diode for providing a current to said third transistor equal to the current through said diode multiplied by a substantially constant multiplication factor.

6. Automatic peaking control circuitry for a video processing system having an aperture correction stage comprising:

bias means including a manually adjustable impedance connected to said aperture correction stage for controlling the gain thereof;

detecting means connected to said aperture correction stage for detecting the amplitude of aperture correction signals in excess of a predetermined threshold; and

gain control means connected to said detecting means and to said bias means for providing an automatic gain control signal to said bias means in response to the detected aperture correction signals.

7. Automatic peaking control circuitry as defined in claim 6 wherein said bias means includes capacitance means charged through said manually adjustable impedance and discharged by said gain control means.

8. Automatic peaking control circuitry as defined in claim 6 wherein said detecting means includes tracking control means connected to said bias means for varying said predetermined threshold in response to the adjustment of said manually adjustable impedance.

9. Automatic peaking control circuitry as defined in claim 8 wherein said detecting means includes a differential amplifier connected to said aperture correction stage and a differential peak detector connected to said differential amplifier, said differential amplifier including first and second transistors having collector resistors with different values for providing a differential off-set voltage, said differential peak detector including a third transistor connected to said gain control means and a fourth transistor, said third transistor conducting current when the amplitude of the aperture correction signals is sufficient to overcome said differential off-set voltage, and said tracking control means is connected to said differential amplifier and to said differential peak detector for controlling the gains thereof in response to the adjustment of said manually adjustable impedance.

10. Automatic peaking control circuitry as defined in claim 9 wherein said tracking control means includes a reference diode connected to said bias means, a first controlled transistor connected to said reference diode and to said differential amplifier for providing a current to said differential amplifier equal to the current through said diode multiplied by a substantially constant multiplication factor, and a second controlled transistor connected to said reference diode and to said differential peak detector for providing a current to said differential peak detector equal to the current through said diode multiplied by a substantially constant multiplication factor.

11. A tracking control circuit for tracking the setting of an adjustable impedance comprising:

a reference diode and a first resistor connected in series with said adjustable impedance for receiving a current proportional to the setting of said impedance;

a first controlled transistor having a base connected to said reference diode and a second resistor connected to an emitter of said first controlled transistor, said first controlled transistor having a collector current proportional to the current through said reference diode and proportional to the ratio of the magnitudes of said first resistor and said second resistor; and

a second controlled transistor having a base connected to said reference diode and a third resistor connected to an emitter of said second controlled transistor, said second controlled transistor having a collector current proportional to the current through said reference diode and proportional to the ratio of the magnitudes of said first resistor and said third resistor.

12. A tracking control circuit as defined in claim 11 wherein the collectors of said first and second controlled transistors are connected to emitters of first and second pairs of differentially connected transistors for causing the gains thereof to track the setting of said adjustable impedance.