Electronic laundry program control apparatus
First Claim
1. An electronic controller for laundry machines of the type having a plurality of electrically controlled subsystems each operable to perform a unique laundering function, comprising:
- (a) read only memory means for storing a plurality of uniquely addressable logical instructions, and for providing logical memory output signals responsive to addressing of said instructions, wherein at least a plurality of said instructions each comprises a plurality of preset logical laundry function control commands arranged in a plurality of memory bits which are commonly activated upon addressing of said instruction to respectively each provide one of said logical memory output signals indicative of that said laundry function control command preset into that said memory bit;
(b) laundry cycle select means for producing in response to manual activation, a plurality of cycle select output signals, said laundry cycle select means having a plurality of switching members each identifiably associated with a different laundry cycle, each of said switching members being operable in response to a single manual activation stimulus to produce one of said cycle select output signals, which is uniquely identified with that activated switching member;
(c) laundry cycle execution means operatively connected with said laundry cycle select means and with said read only memory means, responsive to receipt of a single one of said cycle select output signals, for selectively addressing, in timed manner, a plurality of said memory instructions, to synthesize a complete laundry cycle identifably corresponding to that activated said cycle select switching member from which said cycle select output signal was received; and
(d) output circuit means operatively connecting said read only memory means with the plurality of subsystems of the laundry machine, for automatically activating the plurality of subsystems in response to said logical memory output signals, to execute a plurality of distinct laundering operations which collectively comprise the selected laundry cycle.
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Abstract
Electronic laundry machine controller apparatus for automatically synthesizing, in response to single operator program selections, complete laundry cycles or programs from laundry machine control instructions stored, independent of operator selection or control, within an electronically read memory. A read only memory is preprogrammed to store laundry machine control instructions and program synthesis instructions for compiling a large number of different laundry programs, each having laundering steps or operations preconfigured to satisfy the peculiar laundering requirements of a large number of different commercial and institutional users. Program variation select means presettable by the manufacturer or upon installation of the controller enables preselection for execution from the large number of possible laundry cycles, only those laundry machine cycles which best satisfy the user'"'"'s specific laundering needs. A single user input stimulus to cycle select buttons initiates execution by the controller of a laundry cycle associated with that selection. Addressing and control circuits select and sequentially execute in timed sequence those instructions from memory which correspond to the selected laundry cycle. Each instruction when executed provides digital control signals to laundry machine function control apparatus for performing an identifiable step or operation of the selected program. Unused variations of laundry cycles remain as an integral part of the controller and can be rapidly activated in the event of a change in the user'"'"'s laundering requirements, without physical alteration or addition to the controller, by simple manual switching of entries into the variation selection switching means.
51 Citations
24 Claims
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1. An electronic controller for laundry machines of the type having a plurality of electrically controlled subsystems each operable to perform a unique laundering function, comprising:
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(a) read only memory means for storing a plurality of uniquely addressable logical instructions, and for providing logical memory output signals responsive to addressing of said instructions, wherein at least a plurality of said instructions each comprises a plurality of preset logical laundry function control commands arranged in a plurality of memory bits which are commonly activated upon addressing of said instruction to respectively each provide one of said logical memory output signals indicative of that said laundry function control command preset into that said memory bit; (b) laundry cycle select means for producing in response to manual activation, a plurality of cycle select output signals, said laundry cycle select means having a plurality of switching members each identifiably associated with a different laundry cycle, each of said switching members being operable in response to a single manual activation stimulus to produce one of said cycle select output signals, which is uniquely identified with that activated switching member; (c) laundry cycle execution means operatively connected with said laundry cycle select means and with said read only memory means, responsive to receipt of a single one of said cycle select output signals, for selectively addressing, in timed manner, a plurality of said memory instructions, to synthesize a complete laundry cycle identifably corresponding to that activated said cycle select switching member from which said cycle select output signal was received; and (d) output circuit means operatively connecting said read only memory means with the plurality of subsystems of the laundry machine, for automatically activating the plurality of subsystems in response to said logical memory output signals, to execute a plurality of distinct laundering operations which collectively comprise the selected laundry cycle. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An electronic laundry machine controller for laundry machines of the type having a plurality of electrically controlled subsystems each operable to perform a unique laundering function, comprising:
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(a) read-only memory means for storing a plurality of memory instructions, said memory means having a plurality of selectable memory storage blocks each associated with a different basic laundry cycle, each of said memory storage blocks comprising memory instruction storage means for storing a plurality of addressable memory instructions, whereby each instruction comprises a plurality of presettable bits of logical control information; (b) manually activated laundry cycle select means having a plurality of select switching members each uniquely associated with different one of said memory storage blocks, for operatively enabling, in response to manual stimulation of said select switching members. Corresponding ones of said memory storage blocks, said laundry cycle select means including means for preventing concurrent operative enabling of more than one said memory storage block at a time; (c) variation select switching means for providing a plurality of variation select output signals for each of said memory storage blocks, said variation select switching means being operable, responsive to manual preselection, to produce only one of said plurality of variation output signals at a time for the enabled one of said memory storage blocks; (d) laundry cycle execution means operatively connected to said variation select switching means, to said laundry cycle select means and to said memory means for synthesizing a unique laundry cycle identifiably associated with a preselected variation of an operator selected laundry cycle, said laundry cycle execution means including circuit means responsive to said variation select output signal associated with said enabled memory storage block for selectively operatively addressing, in time controlled manner, said plurality of memory instructions within said enabled memory storage block, to provide a timed sequence of laundry function output commands from the read instructions; and (e) output laundry function control means operatively connected to receive said plurality of logical function output commands for automatically activating a plurality of laundry machine subsystems in response thereto, to execute a corresponding plurality of distinct laundering operations which collectively comprise the preselected execution variation of the selected laundry cycle. - View Dependent Claims (8, 9, 10, 11)
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12. An electronic laundry machine controller for automatically synthesizing timed sequences of electrical logical commands suitable for activating a plurality of subsystems of a laundry machine, to execute uniquely selectable laundry cycles, comprising:
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(a) read only memory means for storing a plurality of preset logical instructions ordered by addressably identifiable groups of said instructions at consecutive memory location addresses so as to produce when read a large number of uniquely different laundry cycles, one each of said instruction groups being unquely associated with one each of said uniquely different laundry cycles, each instruction comprising a plurality of memory bits preset with logical laundry function control commands and being operable when read to provide logical memory output signals indicative of said preset laundry function control commands; (b) manually activated laundry cycle select means for enabling manual selection and initiation of one of said available laundry cycles by means of a single manual input selection, comprising a plurality of selection switching members each identifiably associated with a different one of said laundry cycles and each operatively connected to respectively address when manually activated, that instruction within the respectively associated group of instructions, which corresponds to the first memory instruction of the selected laundry cycle, said laundry select means including means for enabling operatively input selection of only one said selection switching members at a time; and (c) laundry cycle execution means responsive to said input selection by said laundry cycle select means to consecutively address and read, in timed sequential manner, those memory instructions within said selected groups of memory instructions, to synthesize a complete laundry cycle identifiably corresponding to that activated said laundry cycle select switching member, said sequential reading of said selected group intructions providing a timed sequence of said logical memory output signals indicative of said preset laundry function control commands.
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13. An electronic laundry machine controller, for use in a laundry machine of the type having a plurality of subsystems responsive to received electrical commands for executing a plurality of laundering functions, comprising:
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(a) read only memory means for storing a plurality of logical control instructions arranged in a plurality of instruction storage blocks, each of said blocks being functionally associated with a different basic laundry cycle, each said instruction comprising a plurality of read only memory bits preset with a plurality of laundry function control commands and with at least one variation identifier command said variation identifier command identifiably associating that instruction of which it is a part with one of a plurality of possible execution variations of the basic laundry cycle associated with that said storage block;
said memory having a plurality of signal output ports at which logical memory output signals are applied upon active reading of said memory bits of said instructions;(b) first switching means for operatively selecting, in response to manual activation, one of said instruction storage blocks, said first switching means having select circuit means for providing unique laundry cycle selection output signals each identifiably associated with a different one of the selectable basic laundry cycles; (c) presettable second switching means for preselecting one of said execution variations of each said basic laundry cycle, said second switching means having circuit means for providing in response to individual manual preselection stimuli a unique preset variation output signal for each said selectable instruction storage block; (d) timing and control circuit means operatively connected to said second switching means and said read only memory means for controlling the time duration of sequential reading of said memory instructions, comprising; (i) comparator circuit means operatively connected to receive from a memory instruction being read that said logical memory output signal corresponding to said variation identifier command preset in that instruction and to receive from said second switching means said preset variation output signal corresponding to the enabled instruction block of said memory, for comparing said memory output variation signal with said second switching means preset variation output signal and for producing comparison output signals in response thereto;
said comparator circuit means being operable to produce a first comparison output signal upon coincidence of said compared signals and being operable to produce a second comparison output signals upon non-coincidence of said compared signals; and(ii) timing circuit means responsive to said comparison output signals for producing timing advance signals, said timing circuit means being operable in response to receipt of said first comparison output signal to produce a first timing advance signal and being operable in response to receipt of said second comparison output signal to produce a second timing advance signal; and (e) addressing circuit means operatively connected with said read only memory means, said first switching means and said timing and control means for selectively actively reading said read only memory instructions, said addressing circuit means comprising; (i) first circuit means responsive to receipt of said laundry cycle selection output signals for electrically enabling for reading those said instructions within an associated one of said instruction storage blocks; and (ii) sequencing circuit means responsive to receipt of said timing advance signals for actively reading in timed sequential manner said enabled instructions, said sequencing circuit means being operable in response to receipt of said first timing advance signal to successively actively read in timed sequence the instructions within that enabled instruction block in a predetermined timed manner corresponding to the real time execution requirements of said laundry function control commands stored within said respectively read instructions, and being operable in response to receipt of said second timing advance signal to successively actively sequence through reading of the instructions within the enabled instruction block at a relatively rapid rate so as to prevent real time execution of said laundry function control commands stored within said respectively read instructions; and (f) output circuit means operatively connected to receive said logical memory output signals from said signal output ports of said memory for automatically activating a plurality of subsystems of a laundry machine in response to said logical memory output signals, whereby the timed ordered reading of said enabled memory instructions provides to the laundry machine subsystems that combination of logical memory output signals required for execution in time sequential manner that plurality of distinct laundering operations which collectively comprise the preselected variation of the selected basic laundry cycle. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. An electronic laundry machine controller, for use in a laundry machine of the type having a plurality of subsystems responsive to received electrical commands for executing a plurality of laundering functions, comprising:
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(a) read only memory means for storing a plurality of logical control instructions arranged in a plurality of instruction storage blocks, each of said blocks being functionally associated with a different basic laundry cycle, each said instruction comprising a plurality of read only memory bits preset with a plurality of laundry function control commands and with at least one variation identifier code, said variation identifier code identifiably associating that instruction of which it is a part which one of a plurality of possible execution variations of the basic laundry cycle associated with that instruction storage block;
said memory having a plurality of signal output ports at which logical memory output signals are applied upon active reading of said memory bits of said instructions;(b) first switching means for operatively selecting, in response to manual activation, one of said instruction storage blocks, said first switching means having circuit means for providing unique laundry cycle selection output signals each identifiably associated with a different one of the selectable basic laundry cycles; (c) presettable second switching means for preselecting one of said execution variations of each said basic laundry cycle, said second switching means having circuit means for providing in response to individual manual preselection stimuli a unique preset variation output signal for each said selectable instruction storage block; (d) comparator circuit means operatively connected to receive from that said memory instruction currently being read, said logical memory output signal corresponding to said variation identifier code preset in that instruction and to receive from said second switching means said preset variation output signal corresponding to the enabled instruction block of said memory, for comparing said memory output variation code signal with said second switching means preset variation output signal and for producing comparator output signals in response thereto;
said comparator circuit means being operable to produce a first comparator output signal upon coincidence of said compared signals and being operable to produce a second comparator output signal upon non-coincidence of said compared signals;(e) addressing circuit means operatively connected with said read only memory means, said first switching means and said comparator circuit means for selectively actively reading said read only memory instructions, said addressing circuit means comprising; (i) block selection circuit means responsive to receipt of said laundry cycle selection output signals for selectively electrically enabling for reading those said instructions within that one of said instruction storage blocks associated with the currently received laundry cycle selection output signal; and (ii) instruction addressing circuit means responsive to receipt of said comparator output signals for actively addressing in timed ordered manner those said instructions within the selected instruction storage block, whereby each said instruction is operatively read upon addressing by said instruction addressing circuit means;
said instruction addressing circuit means being operable in response to receipt of said first comparator output signal to successively actively read in timed ordered manner said instructions within that enabled instruction block in a predetermined timed manner corresponding to the real time execution requirements of said laundry function control commands read from respectively addressed instructions, and being operable in response to receipt of said second comparator output signal to address in relatively rapid successive manner those instructions within the enabled instruction block so as to prevent real time execution of said laundry function control commands stored within those respectively addressed instructions; and(f) output circuit means operatively connected to receive said logical memory output signals from said signal output ports of said memory for automatically activating a plurality of subsystems of a laundry machine in response to said logical memory output signals, whereby the timed ordered reading of said selectively addressed memory instructions provides to the laundry machine subsystems that combination of logical memory output signals required for executing in time sequential manner that plurality of distinct laundering operations which collectively comprise the preselected variation of the selected basic laundry cycle. - View Dependent Claims (24)
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Specification