Verification technique for checking wrapped wire electronic boards

• US 4,091,325 A
• Filed: 02/08/1977
• Issued: 05/23/1978
• Est. Priority Date: 02/08/1977
• Status: Expired due to Term

• Current Assignee: United States Of America As Represented By The Secretary Of The Army (Government of the United States of America)
• Original Assignee: The United States Of America As Represented By The Secretary Of The Army
• Inventors: Marcus, Ira R., Lee, Albert
• Primary Examiner(s): Strecker, Gerard R.
• Application Number:
  US05/766,648
• Time in Patent Office: 469 Days
• Field of Search: 324/51, 324/66, 324/73, 324/73 PC
• US Class Current: 324/538
• CPC Class Codes: G01R 31/67 Testing the correctness of wire connections in electric apparatus or circuits

Abstract

A verification technique which greatly simplifies and facilitates the tesg of the wiring of wrapped wire electronic boards. The technique contemplates continuity testing of each branch and discontinuity testing between successive branches. After a continuity test for one branch and a discontinuity test with the next succeeding branch, the two branches are then short-circuited. The procedure is repeated with each wired branch until all branches have been tested, whereupon the short-circuit wire may then be removed. The testing technique may be facilitated by utilizing a numerically controlled terminal locator in combination with a computer generated control tape. The technique also contemplates a visual check to verify that all pins on the board that are intended to be wired are indeed wired, and that all pins on the board which are not intended to be wired are indeed bare.

Claims

1. A technique for verifying the hard wiring of wrapped wire electronic boards, said boards comprising a substrate upon which are formed a plurality of electrically-conductive pins, groups of said pins being wired together to form a plurality of branches, each of said branches comprising at least a first pin and a last pin electrically wired to one another, said technique comprising the steps of:

a. testing for electrical continuity between the first pin and last pin of a first branch;

then, after determining whether continuity does or does not exist,

b. testing for electrical discontinuity between said first pin of said first branch and the first pin of a succeeding branch;

upon ascertaining whether there is or is not discontinuity between the branches,

c. electrically connecting said first pin of said first branch to said first pin of said succeeding branch;

d. testing for electrical continuity between said first pin of said first branch and the last pin of said succeeding branch; and

then, after finding if continuity does or does not exist in the succeeding branch,

e. repeating the above steps b) through d) for each succeeding branch on the board.

2. The technique as set forth in claim 1, further comprising the step of electrically disconnecting said first pins of each branch after steps a) through e) have been performed.

3. The technique as set forth in claim 1, further comprising the step of checking each of said pins on said board to verify that all pins which are supposed to be wired are indeed wired, and all pins which are supposed to be bare are indeed bare.

4. The technique as set forth in claim 1, wherein said step a) comprises the steps of placing a first probe of an electrical continuity meter on said first pin of said first branch, placing a second probe of said meter on said last pin of said first branch, and verifying that a short-circuit exists between said first and last pins of said first branch.

5. The technique as set forth in claim 4, where in said first probe of said meter is maintained in electrical contact with said first pin of said first branch while said steps b) through e) are performed.

6. The technique as set forth in claim 5, wherein said step b) comprises the steps of placing said second probe on said first pin of said succeeding branch and verifying that an open-circuit exists between said first pin of said first branch and said first pin of said succeeding branch.

7. The technique as set forth in claim 6, wherein said step d) comprises the steps of placing said second probe on said last pin of said succeeding branch and verifying that a short-circuit exists between said first pin of said first branch and said last pin of said succeeding branch.

8. The technique as set forth in claim 7, further comprising the step of checking each of said pins on said board to verify that all pins which are supposed to be wired are indeed wired, and all pins which are supposed to be bare are indeed bare.

9. The technique as set forth in claim 8, further comprising the step of electrically disconnecting said first pins of each branch after steps a) through e) have been performed.

10. A technique for verifying the hard wiring of wrapped wire electronic boards, said boards comprising a substrate upon which are formed a plurality of electrically-conductive pins, groups of said pins being wired together to form a plurality of branches, each of said branches comprising at least a first pin and a last pin electrically wired to one another, said technique comprising the steps of:

a. electrically connecting each of the first pins of each of said branches to one another;

b. testing for electrical continuity between the first pin of the first branch and the last pin of the last branch;

then, upon ascertaining whether there is or is not continuity between the branches,

c. disconnecting the first pin of the last branch from the first pins of the remaining branches;

d. testing for electrical discontinuity between the first pin of the last branch and the first pin of the first branch; and

then, after determining if there is or is not any discontinuity between the branches,

e. repeating the above steps b) through d) for each preceding branch on the board.