Charge coupled device with input for direct injection of signal

• US 4,093,872 A
• Filed: 09/02/1975
• Issued: 06/06/1978
• Est. Priority Date: 01/25/1974
• Status: Expired due to Term

• Current Assignee: Hughes Aircraft Company (Rtx Corporation)
• Original Assignee: Hughes Aircraft Company (Rtx Corporation)
• Inventors: Hartman, John M., Erb, Darrell M.
• Primary Examiner(s): Larkins, William D.
• Assistant Examiner(s): Munson, Gene M.
• Application Number:
  US05/609,774
• Time in Patent Office: 1,008 Days
• Field of Search: 357/24, 357/30, 307/221 D, 307/304
• US Class Current: 377/57
• CPC Class Codes: G11C 19/282 with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
• CPC Class Codes: H01L 27/14881 of the hybrid type
• CPC Class Codes: H01L 29/42396 for charge coupled devices
• CPC Class Codes: H01L 29/76808 Input structures

Abstract

Signals generated by an infrared (I.R.) detector are injected directly into a charge coupled device (CCD) by means of a DC biased electrode structure interposed between the detector and one of the clocked transfer electrodes of the CCD.

Claims

1. In semiconductor apparatus wherein a dielectric layer is disposed over a surface of a semiconductive storage medium and a series of electrodes are disposed in or over said dielectric layer for causing a series of potential wells to be formed in response to voltages applied to said electrodes periodically, said potential wells being adapted to store packets of electric charge, said electrodes being operable in response to said voltages to transfer said charge packets along said potential wells, the improvement whereby charge may be injected directly into said storage medium comprising:

(a) means for injecting charge into said storage medium near at least one of said potential wells;

(b) means connected to said injecting means for generating an analog signal so as to cause a charge proportional to said analog signal to be injected into said substrate through said injecting means;

(c) an electrode structure disposed between said injecting means and said at least one potential well; and

(d) a steady bias voltage source connected to said electrode structure, said electrode structure including a transfer portion nearest said injecting means and a storage portion nearest said at least one potential well and non-overlapping with said injecting means, said electrode structure and said steady bias voltage being arranged so as to maintain a potential well under said electrode structure which is deeper under said storage portion than it is under said transfer portion whereby said charge injected through said injecting means is temporarily stored under said storage portion, isolated from said injecting means.

2. The improvement of claim 1 characterized further in that said transfer portion and said storage portion are at the same electric potential, with the storage portion being positioned closer to the surface of said storage medium than said transfer portion in order to create a deeper potential well thereunder.

3. The improvement of claim 1 characterized further in that said storage portion is electrically separate from said transfer portion and in that said means for applying a steady bias voltage includes means for applying separate independently controlled steady bias voltages to said portions.

4. The improvement of claim 3 characterized further in that said transfer portion is positioned on the surface of said dielectric layer and said storage portion is buried in said dielectric layer.

5. In a CCD shift register for processing signals applied thereto directly from a plurality of I.R. detectors, said shift register having a dielectric layer disposed over a surface of a semiconductive storage medium and a series of electrodes disposed in or over said dielectric layer for causing a series of potential wells to be formed in response to voltages applied to said electrodes periodically, said potential wells being adapted to store packets of electric charge, said electrodes being operable in response to said voltages to transfer said charge packets along said potential wells, the improvement whereby charge may be injected directly into said storage medium from said I.R. detectors comprising:

(a) means for individually injecting charge from respective ones of said I.R. detectors into said storage medium near respective ones of said potential wells so that each said potential well becomes associated with a respective one of said injecting means;

(b) an electrode structure disposed between each said injecting means and its associated potential well; and

(c) means for applying a steady bias voltage to said electrode structure such that a potential well is maintained under said electrode structure, said electrode structure including a transfer portion nearest said injecting means and a storage portion nearest said at least one potential well and non-overlapping with said injecting means, said electrode structure and said steady bias voltage being arranged so as to maintain a potential well under said electrode structure which is deeper under said storage portion than it is under said transfer portion whereby charge injected through said injecting means is temporarily stored under said storage portion, isolated from said injecting means.

6. The improvement of claim 5 characterized further in that said electrode structure includes a transfer portion nearest said injecting means and a storage portion nearest said associated potential well, and in that the potential well under said electrode structure is deeper under said storage portion than it is under said transfer portion.

7. The improvement of claim 6 characterized further in that the transfer portions of the respective electrode structures are formed from a first integral conductor strip and in that the storage portions of said electrode structures are formed from a second integral conductor strip.

8. The improvement of claim 7 characterized further in that said first conductor strip is disposed on the surface of said dielectric layer and in that said second conducting strip is buried in the body of said dielectric layer, said first and second conductor strips being maintained at the same steady bias voltage.