Gaming machines

• US 4,101,129 A
• Filed: 04/15/1976
• Issued: 07/18/1978
• Est. Priority Date: 04/17/1975
• Status: Expired due to Term

• Current Assignee: Bell-Fruit Manufacturing Company Limited
• Original Assignee: Bell-Fruit Manufacturing Company Limited
• Inventors: Cox, Calvin Howard
• Primary Examiner(s): Pinkham, Richard C.
• Assistant Examiner(s): Hum, Vance Y.
• Application Number:
  US05/677,291
• Time in Patent Office: 824 Days
• Field of Search: 194/1 M, 194/1 N, 235/92 GA, 273/1 E, 273/138 A, 273/139, 273/143 R, 340/323 R
• US Class Current: 463/20
• CPC Class Codes: G07F 17/3244 Payment aspects of a gaming system, e.g. payment schemes, setting payout ratio, bonus or consolation prizes
• CPC Class Codes: G07F 17/34 depending on the stopping of moving members in a mechanical slot machine, e.g. "fruit" machines

Abstract

In a gaming machine of the kind which selects a combination of symbols at random during each game and awards prizes when predetermined prize-winning combinations occur, a detector for detecting said prize-winning combinations of symbols comprising a first memory for storing information of each of a number of predetermined symbols which can occur in said selected combinations, a second memory storing information of each of a number of predetermined symbol occurence patterns which can occur in said selected combinations, a first set of comparators for comparing each of the symbols in a selected combination with each in turn of said predetermined symbols stored in said first memory so as to determine an occurrence pattern for each of said predetermined symbols, and a second set of comparators for comparing each determined occurrence pattern in turn with a number of predetermined occurrence patterns stored in said second memory which are associated with the predetermined symbol used for comparison in determining said occurrence pattern and which correspond to prize-winning combinations, the second set of comparators producing a coincidence signal to indicate a win when the determined occurrence pattern corresponds to a predetermined occurrence pattern. Thus each selected combination is analysed a plurality of times using a different combination of predetermined symbol and occurrence pattern each time so as to "look for" each possible prize-winning combination in turn.

Claims

1. Means for detecting prize-winning combinations of symbols in a gaming machine of the kind which selects a combination of symbols at random during each game and awards prizes when predetermined prize-winning combinations occur, said means comprising first memory means for storing information of each of a number of predetermined symbols that can occur in said selected combinations;

first comparison means for carrying out succesive first comparison operations in each of which it compares all of the symbols in a selected combination with a respective one of said predetermined symbols stored in said first memory means so as to determine an occurrence pattern for that particular predetermined symbol in said selected combination;

second memory means for storing information of each of a number of predetermined symbol occurrence patterns that can occur in said selected combinations; and

second comparison means for carrying out successive second comparison operations in each of which it compares one of said occurrence patterns determined by said first comparison means with a respective one of said predetermined occurrence paterns stored in said second memory means that is associated with the predetermined symbol used in the first comparison operation to determine said occurrence pattern and that corresponds to a prize-winning combination, said second comparison means producing a coincidence signal to indicate a win when said determined occurrence pattern corresponds to said predetermined occurrence pattern.

2. Means according to claim 1 including symbol detector means which produces a characteristic coded signal for each symbol in a selected combination.

3. Means according to claim 2 in which said first comparison means comprises a first set of symbol comparator units, in each of which a respective coded signal from the symbol detector means is stored.

4. Means according to claim 3 in which said first memory means produces a characteristic coded signal for each in turn of the predetermined symbols stored therein and feeds this to each of the symbol comparator units in which it is compared with the stored coded signal, each comparator unit producing a coincidence signal when the stored signal and predetermined signal from the first memory means are the same, the resulting combination of coincidence signals from the comparator units corresponding to the determined occurrence pattern.

5. Means according to claim 4 in which the first memory means comprises a first programmable data storage means which is programmed to feed the required coded signal for each predetermined signal to the first set of comparator units in a predetermined sequence.

6. Means according to claim 5 in which the second comparison means comprises a second comparator unit in which the combination of coincidence signals from the symbol comparator units is stored, and in which the second memory means produces a coded signal corresponding to each predetermined occurrence pattern and feeds this to the second comparator unit, the comparator unit comparing the stored and predetermined signals and producing a win coincidence signal when they are the same.

7. Means according to claim 6 in which the second memory means comprises a second programmable data storage means which is programmed to feed the required coded signal for each predetermined occurrence pattern to the second comparator unit in a predetermined sequence.

8. Means according to claim 7 in which clock means controls the supply of coded signals from the first and second data storage means.

9. Means according to claim 8 in which the clock means is triggered by an enable signal each time a symbol is stored in the first set of symbol comparator units.

10. Means according to claim 9 in which the clock means is inhibited by an inhibit signal each time a win coincidence signal is produced.

11. Means according to claim 10 in which said first and second data storage means comprise a number of programmed read only memory units.

12. Means according to claim 8 including prize awarding means which awards a prize when a win coincidence signal is received from the second comparison means, said prize awarding means including a prize value choosing unit in the form of a third programmable data storage means which is programmed to produce a coded signal characteristic of a particular prize value for each combination of predetermined symbol and occurrence pattern, and awarding means which responds to said prize value signal by awarding the corresponding value prize if a win coincidence signal is produced by the second comparison means.

13. Means as claimed in claim 12 in which the clock means controls the supply of coded prize value signals from the third programmable data storage means.

14. Means according to claim 13 in which the clock means is triggered by an enable signal each time a symbol is stored in the first set of symbol comparator units.

15. Means according to claim 13 in which the clock means is inhibited by an inhibit signal each time a win coincidence signal is produced.

16. Means according to claim 15 in which any of said first, second or third data storage means comprises a number of programmed read only memory units.

17. Means according to claim 1 including prize winning awarding means which awards a prize when a win coincidence signal is received from the second comparison means.

18. Means according to claim 17 in which the prize awarding means includes a prize value choosing unit which produces a coded signal characteristic of a particular prize value for each combination of predetermined symbol and occurrence pattern, and awarding means which responds to the prize value signal by awarding the corresponding value prize if a win coincidence signal is produced by the second comparison means.

19. Means according to claim 18 in which the awarding means responsive to the prize value signals comprises a counter which is set in a corresponding counting state by each prize value signal, and a payout pulse generator which is triggered by said coincidence signal from the second comparison means and feeds pulses to the counter causing it to count down to zero, a coin payout operation being initiated by each pulse.

20. Means according to claim 18 in which the prize value choosing unit comprises a third programmable data storage means which is programmed to feed the required coded signal for each predetermined prize value to the awarding means in a predetermined sequence.

21. Means as claimed in claim 20 in which clock means controls the supply of coded prize value signals from the third programmable data storage means.

22. Means for detecting prize-winning combinations of symbols in a gaming machine of the kind which selects a combination of symbols at random during each game and awards prizes when predetermined prize-winning combinations occur, said means comprising detector means for producing a characteristic coded signal for each symbol in a selected combination;

first memory means for storing information of each of a number of predetermined symbols that can occur in said selected combination and for producing a sequence of coded signals, each characteristic of one of said predetermined symbols stored therein;

a set of first symbol comparator units adapted so that each receives and stores a respective coded signal from the symbol detector means and all receive the same coded signal produced by said first memory means at any one instant and carry out one of a succession of first comparison operations corresponding to said sequence of coded signals from said first memory means, each comparator unit producing a coincidence signal when the two coded signals receives by it are the same, the resulting combination of coincidence signals from the comparator units corresponding to a coded occurrence pattern signal for that particular predetermined symbol associated with the coded signal produced by said first memory means;

second memory means for storing information of each of a number of predetermined symbol occurrence that can occur in said selected combination and for producing a sequence of coded signals, each characteristic of one of said predetermined occurrence patterns stored therein; and

a second comparator unit adapted to receive each in turn of said coded occurrence pattern signals produced by said first symbol comparator units and to compare each, in one of a succession of second comparison operations, with a number of said coded occurrence pattern signals produced by said second memory means, which coded occurrence pattern signal produced by said second memory means is associated with the predetermined symbol used in the first comparison operation to determine that coded occurrence pattern signal and corresponds to a prize-winning combination, said second comparator unit producing a coincidence signal to indicate a win when the compared coded occurrence pattern signals are the same.