Method for data transmission and a system for carrying out the method

• US 4,103,288 A
• Filed: 09/14/1976
• Issued: 07/25/1978
• Est. Priority Date: 09/18/1975
• Status: Expired due to Term

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Westman, Kjell Harry
• Primary Examiner(s): Pitts, Harold I.
• Application Number:
  US05/723,155
• Time in Patent Office: 679 Days
• Field of Search: 340/152 R, 340/147 R, 340/147 SY, 179/15 AL, 178/2 C, 178/2 D
• US Class Current: 714/800
• CPC Class Codes: H04J 3/245 in which the allocation protocols between more than two stations share the same transmission medium stations for satellite systems H04B7/185
• CPC Class Codes: H04L 12/423 with centralised control, e.g. polling

Abstract

The invention is related to a method for data transmission between a central station and a number of terminal stations being connected to a closed series transmission loop provided between the output and input of the central station, in which the transmission is carried out bit-by-bit in one and the same direction through the loop and under the control of the central station. The invention is further directed to a system for carrying out the method.

Claims

1. A method for transmission of data between a central station and a number of terminal stations which are connected to a closed series transmission loop provided between the output and the input of the central station, in which the transmission is carried out bit-by-bit in one and the same direction through the loop under control of the central station and in which all data is transferred in the form of a transmission block having an output data phase, a general polling character and in input data phase, each output and input data phase having a data message, which comprises the steps of providing the data message with an adress portion comprising a predetermined number of bits indicating in a binary code the address of the terminal station associated with the data message;

providing the data message during an output data phase, at least one data message being transmitted by the central station to the terminal stations to which the central station has output data to send during the output data phase;

providing the transmission block with a general polling character from the central station at the end of the output data phase for preparing the terminal stations having input data to send for transmission; and

providing the transmission block with an input data phase after the general polling character, at least one data message being transmitted to the central station during the input data phase by each of the terminal stations prepared in this manner; and

providing a subsequent transmission block, also comprising an output data phase, a general polling character and an input data phase, the subsequent transmission blcok being initiated by the central station when the end of the earlier input data phase is sensed, the lengths of the output and the input phases always being adapted to the actual data transfer need.

2. A method as claimed in claim 1, wherein during the output data phase each of the output data messages is sent forward on the loop and back to the central station after the data portion thereof has been modified by the receiving terminal station, the modification being carried out without breaking the continuity of the message bit sequence appearing on the loop.

3. A method as claimed in claim 2, wherein said modification comprises inversion of all the bits of the data message.

4. A method as claimed in claim 2, in which the data portion of each data message is finished by a parity bit, wherein the modification comprises a change of the parity bit so as to indicate whether or not the terminal station is prepared to receive output data during the next following output data phase and that the remaining bits of the data portion are inverted.

5. A method as claimed in claim 2, wherein the modification comprises replacing the data portion of the data message by new input data.

6. A method as claimed in claim 1, wherein the central station and each of the terminal stations after recognizing a parity error of a received data message will send during the next following transfer phase a data message the data portion of which comprises a parity error indicating control character, and wherein said control character will initiate a repeated transmission of the erroneous data message during the next following transfer phase.

7. A method as claimed in claim 1, wherein the central station is arranged to transmit a continuous sequence of synchronizing control characters when there is no other transmission, in which the sequence of synchronizing control characters is used as a filling for the line delay of the transfer loop, and wherein the central station will initiate transmission of the next following output data phase after having received one of said synchronizing control characters which has circulated on the loop.

8. A method as claimed in claim 7, wherein each of the terminal stations not recognizing with a predetermined regularity the polling character or one of the synchronizing control characters being transmitted at each transmission block by the central station will fall out of synchronism and thereafter await a new synchronization by the synchronizing control characters which are transmitted by the central station in connection with the next following transfer block.

9. A system for the transmission of data between a central station and a number of terminal stations which are connected to a closed series transmission loop provided between the output and the input of the central station, the transmission of data being carried out bit-by-bit in one and the same direction through the loop under the control of the central station, which system comprises means for forming a data transmission block, means for providing said data transmission block with an output data phase during which at lest one data message is transmitted by the central station to the terminal stations to which the central station has output data to send, the output data phase having an address portion comprising a predetermined number of bits indicating in a binary code the address of the terminal station associated with the data message, means for providing said data transmission block with a general polling character from the central station at the end of the data phase for preparing the terminal stations having input data to send for transmission, and means for providing said data transmission block with an input data phase after the general polling character, at least one data message being transmitted to the central station during the input data phase by each of the terminal stations, and means for providing a subsequent data transmission block, also comprising an output data phase, a general polling character and an input data phase, the subsequent transmission block being initiated by the central station when the end of the earlier input data phase is sensed, the lengths of the output and the input data phases always being adapted to the actual data transfer need, each of the terminal stations comprising a controllable 2-position switch having a first position in which the terminal station is bridged and a second position in which an output from the terminal station is connected in series with the loop, and a decoding and timing circuit for generating time control signals by decoding the contents of an input register which is connected permanently to the loop and by recognizing the symbols appearing on the loop control signals for the control of the terminal station during an output data phase and input data phase.

10. A system as claimed in claim 9, wherein the decoding and timing circuit comprises means for generating, during an output data phase after recognizing the address of the terminal station, a first control signal for changing the 2-position switch to the second position thereof so that the loop is opened and the data portion of the data message is supplied to a reception register, said data portion being simultaneously passed through said modification circuit and rejoined to the address portion on the loop, and for generating, at the end of the data message, a second control signal for resetting the 2-position switch to its first position.

11. A system as claimed in claim 9, wherein each of the terminal stations comprises means for generating a status signal which is high or low dependent on whether the transmission register holds a data message, the decoding and timing circuit, when receiving a polling control character, will generate a third control signal which in combination with a high status signal will change the 2-position switch to the second position and connect the transmission register in series with the loop via connection means, further control means being provided for generating a control signal for resetting the 2-position switch to the first position after the transmission register has been reset.

12. A system as claimed in claim 10, wherein each of the terminal stations comprises a parity check circuit for a parity check of the contents of the reception register, a control means, which when the parity check is acknowledged will supply the contents of the reception register to reception means provided for this purpose in the terminal, and which when the parity check is not acknowledged will supply a no-acknowledgement signal to the transmission register to be sent as an input data message during the next following input data phase.

13. A system as claimed in claim 9, wherein each of the terminal stations comprises a synchronization check circuit arranged so as to, dependent on output signals from the decoding and timing circuit, check if the polling character or the synchronizing control character is received at a predetermined minimum frequency in the input register, and to take the terminal out of synchronism when this condition is not met and then to reset the relevant registers of the terminal.

14. A system as claimed in claim 9, wherein the central station comprises a control unit for controlling the transmission of information and control characters dependent on information which is received from the loop, a synchronizing generator which is controlled by the control unit, and a polling character generator which is controlled by the control unit, the output of said generators being connected together with the output of an output data buffer register to the output of the central station via a transmission gate.

15. A system as claimed in claim 14, wherein the central station comprises a decoding and timing circuit for the control of the information received from the loop, in which the decoding and timing circuit will generate a first enabling control signal to a first gate member at the reception of output data messages which have circulated the loop while being modified by the actual terminal stations, and a second enabling control signal to a second gate member at the reception of input data messages from the terminal stations.

16. A system as claimed in claim 15, wherein the decoding and timing circuit of the central station comprises means for generating a control signal by which the control unit starts the output data phase of the next following transfer block when a synchronizing control character in the input data buffer register is recognized.