Asynchronous digital locking system

• US 4,104,694 A
• Filed: 10/28/1976
• Issued: 08/01/1978
• Est. Priority Date: 11/04/1974
• Status: Expired due to Term

• Current Assignee: Daniel J. Hargrove
• Original Assignee: Daniel J. Hargrove
• Inventors: Hargrove, Daniel J.
• Primary Examiner(s): Moose, Jr., Harry E.
• Application Number:
  US05/736,715
• Time in Patent Office: 642 Days
• Field of Search: 361/172, 340/147 R, 340/6, 340/147 MD, 340/164 R, 340/164 A, 340/167 R, 340/168 R, 340/168 S
• US Class Current: 340/5.65
• CPC Class Codes: G07C 2009/00761 with data transmission performed by connected means, e.g. mechanical contacts, plugs, connectors
• CPC Class Codes: G07C 2209/08 With time considerations, e.g. temporary activation, valid time window or time limitations
• CPC Class Codes: G07C 9/00182 operated with unidirectional data transmission between data carrier and locks

Abstract

An asynchronous digital electronic combination locking system including a hand-held transmitter means for providing timed and coded transmission data, and a receiver for providing timed and coded receiver data and comparing the receiver data with the incoming transmission data. The door locking apparatus is opened only when said timed and coded data matches.

Claims

1. An electronic combination locking system including a binary electrical transmitter circuit and a binary electrical receiver circuit means in which the transmitter circuit signal to the receiver circuit enables the receiver clock comprising:

said transmitter circuit including,

a transmitter clock, and

a transmitter means connected to said transmitter clock for providing an timed and coded signal, and said transmitter means connectable to said receiver circuit means, and said transmitter means includes at least one parallel to serial shift register,

said receiver circuit means including, a receiver clock means, a start-stop means connected to said receiver clock means, said start-stop means connectable to said transmitter means for enabling said receiver clock means by receipt of said timed and coded signal, and

data and time comparator means connected to said receiver clock means for decoding the timed and coded signal and providing a true code at true time output signal for operating locking means when the receiver circuit means is connected to said transmitter means.

2. An electronic combination locking system as set forth in claim 1 wherein;

said parallel to serial shift register is connected to said transmitter clock,

and the output signal of said transmitter clock is slower than the output of said receiver clock.

3. An electronic combination locking system as set forth in claim 2 wherein,

the data and time comparator means includes a data decoder means connectable to said transmitter means and a timing match means connected between said data decoder means and said receiver clock means to provide said output signal.

4. An electronic combination locking system as set forth in claim 3 wherein,

said decode means includes at least one shift register connectable to said transmitter means, and a data decoder connected to said shift register, said data decoder is connected to said timing match means to produce said output signal.

5. An electronic combination locking system as set forth in claim 3 wherein,

said transmitter means includes

a receiver connection means,

a coded signal control means having an output connected to said receiver connection means, said coded signal control means providing a timed sequence of at least one digital signal in a combination to said receiver connection means;

means connected to said transmitter means for initiating the transmitted signal, and

said transmitter clock connected to said coded signal control means for providing a timed and coded signal, and

said receiver circuit means including said start-stop means connected to said decode means,

a transmitter connecting means connected to said start-stop means,

locking means and means connected to said output signal to open said locking means, said locking means including,

a lock device and

a sensor means to re-lock said lock device, and said receiver clock means includes a clock and at least one binary counter.

6. An electronic combination locking system as set forth in claim 5 wherein;

said shift register having means to accept at least seven data bits; and

said coded signal control means includes at least one shift register having means to transmit at least seven data bits.

7. An electronic combination locking system as set forth in claim 1 further including,

a locking device, and

means connected to said output signal to energize said locking device.

9. An electronic combination locking system as set forth in claim 4, wherein:

said receiver means provides power to said transmitter means.

8. An electronic combination locking system including an electrical transmitter circuit and an electrical receiver circuit means in which the transmitter circuit signal to the receiver circuit enables the receiver clock comprising:

said transmitter circuit including,

a transmitter clock, and

a transmitter means connected to said transmitter clock for providing an timed and coded signal, and said transmitter means connectable to said receiver circuit means,

said receiver circuit means including;

a receiver clock means,

a start-stop means connected to said receiver clock means, said start-stop means connectable to said transmitter means for enabling said receiver clock means by receipt of said timed and coded signal, and

data and time comparator means connected to said receiver clock means for decoding the timed and coded signal and for providing a true code at true time output signal for operating locking means when connected to said transmitter means,

the data and time comparator means includes a data decoder means connectable to said transmitter means and said timing match means connected between said data decoder means and said receiver clock means to provide said output signal, and

said timing match means includes a second time match means to provide a second point check for data true and time true to be compared during time true.

10. An electronic combination locking system comprising:

a transmitter means providing a timed and codes signal, and

a receiver means connectable to said transmitter means, said receiver means including

a receiver clock means connectable to said transmitter means, said transmitter means enables said receiver clock means,

data means for decoding the coded signal at right time, said data means connected to said receiver clock means for providing a true code at true time output signal, and

a programmable means connected to said transmitter means for transmitting data at a selected correct time,

said receiver means including a delay means inhibiting data which is transmitted prior to the selected correct time.

11. An electronic combination locking system as set forth in claim 10 including:

additional means connected to said receiver means to deter use of the system random picking.

12. An electronic electrical key comprising:

a circuit including

transmitter clock means;

a parallel to serial shift register connected to said transmitter clock means,

a programmable means connected to said shift register for transmitting data at a selected correct time, and

means for input power and for transmitting output connected to said shift register.