Data communication receiver and transfer apparatus

• US 4,107,656 A
• Filed: 05/23/1977
• Issued: 08/15/1978
• Est. Priority Date: 05/23/1977
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Farnsworth, Richard G.
• Primary Examiner(s): Pitts, Harold I.
• Application Number:
  US05/799,581
• Time in Patent Office: 449 Days
• Field of Search: 340/151 R, 340/163 R, 340/147 SY
• US Class Current: 375/356
• CPC Class Codes: H04L 1/0078 Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location forward error control, e.g. FEC, CRC H04L1/004; adaptive formatting H04L1/0006; mappings H04L27/00
• CPC Class Codes: H04L 25/45 using electronic distributors
• CPC Class Codes: H04Q 9/14 Calling by using pulses

Abstract

Apparatus for use in a communication system of the type including a plurality of message generating units for simultaneously transmitting messages to a control center. A plurality of receivers are provided for receiving the messages and means for compensating for inherent system message transmission delays to ensure against the loss of data transferred to the control center.

Claims

1. In a communication system of the type including a plurality of message generating sources directable to simultaneously provide messages to a user device, apparatus for receiving messages from said sources and for preventing the loss of message data by compensating for the difference in time between the arrival of the earliest and the latest received messages due to inherent message delays in the system and for effecting the simultaneous transfer of the received messages to said user device, said apparatus comprising;

(a) a plurality of receivers, each in communication with at least one of said message generating sources, each of said receivers including,

(1) means for generating a clock signal in response to a received message,

(2) means for storing the received message in response to said clock signal;

(b) means common to said plurality of receivers including,

(1) means responsive to the clock signal from each of said receivers for generating an output pulse corresponding to only the clock signal generated by the receiver to receive the earliest arrived message,

(2) delay means responsive to said output pulse for generating a delay pulse at a prescribed interval of time after said output pulse, said interval of time being of sufficient duration to allow the latest arrived message to be received by the receiver receiving the latest message,

(3) means enabled by said delay pulse to generate a transfer signal; and

(c) means coupled to the means for storing in each of said receivers and responsive to said transfer signal to effect the simultaneous transfer of the stored message from each receiver to said user device.

2. The apparatus in accordance with claim 1 further including means for generating a timing signal and wherein said means for generating said clock signal includes means for detecting coincidence between said timing signal and said received message to effect the generation of said clock signal.

3. The apparatus in accordance with claim 1 wherein said means for storing the received message comprises at least one flip flop.

4. The apparatus in accordance with claim 1 wherein said means responsive to said clock signal includes gate means, including an inhibit input terminal, for generating said output pulse and further including means responsive to said output pulse for providing an inhibit pulse to said inhibit input terminal to allow said output pulse to be generated by only the clock signal generated by the receiver receiving the earliest arrived message.

5. Apparatus in a communication system having inherent message delays connected between a user device and a common communication line for parallel transferring of messages to the user device, the messages being received by said apparatus in bit serialized form from a plurality of message generating units directable to simultaneously transmit the messages over said communication line, said apparatus comprising:

(a) a source of clock pulses;

(b) a plurality of message receivers, each tuned to a different frequency to receive a bit serialized message from a corresponding message at each receiver'"'"'s respectively tuned frequency, each of said message receivers including,

(1) means responsive to said clock pulses and to a serialized message received thereby to effect the generation of a strobe pulse for each bit in the serialized message,

(2) buffer storage means for storing bit portions of the serialized message in response to the strobe pulses,

(c) means common to said plurality of receivers including,

(1) logic means including inhibit means receiving the strobe pulses from said receivers, said logic means responsive to the first strobe pulse generated by the receiver receiving the earliest serialized message bit to arrive at said receivers to generate a delay initiation pulse and inhibit the generation of a further delay initiation pulse,

(2) delay means responsive to the delay initiation pulse for generating a delay signal, said delay signal occurring at a specified point in time, after said delay initiation pulse, to allow the latest arrived serialized message bit to be received by the receiver receiving the latest message bit,

(3) means for generating a transfer signal in response to the delay signal; and

(d) transfer means coupled to the storage means of said receivers and responsive to the transfer signal to effect the parallel transfer of a bit portion of the stored serialized message from each of said receivers to said user device.

6. The apparatus in accordance with claim 5 wherein said means responsive to said clock pulses includes means for detecting coincidence between said clock pulses and the first bit of the serialized message to effect the generation of the strobe pulse for each bit in the serialized message.

7. The apparatus in accordance with claim 5 wherein each of said receivers further includes delay means responsive to said strobe pulse for generating a delay pulse and wherein said buffer storage means includes first and second flip flops, said first flop receiving a message bit in response to each strobe pulse and said second flip flop receiving the previously stored message bit from said first flop in response to said delay pulse, said delay pulse transferring the message bit from said first flip flop into said second flip flop prior to said first flip flop receiving a next message bit, the output of said second flip flop being connected to said transfer means.

8. The apparatus in accordance with claim 7 wherein said means for generating said transfer signal further provides a signal, prior to said transfer signal, to the delay means in each of said receivers to effect an early generation of the delay pulse in the receiver receiving the latest arrived message bit to effect a transfer of the message bit from said first flip flop into said second flip flop to ensure that that message bit is stored in said second flip flop prior to transfer of the message bit portion from each of said receivers to said user device.

9. The apparatus in accordance with claim 5 wherein said logic means comprises gate means, including an inhibit input terminal, for generating said delay initiation pulse and wherein said inhibit means comprises a flip flop responsive to said delay initiation pulse for providing an inhibit pulse to said inhibit input terminal to allow said delay initiation pulse to be generated by only the strobe pulse generated by the receiver receiving the earliest arrived message bit.

10. In a data communication system of the type including a plurality of terminal units distributed along a common communication line directable for the simultaneous transmission of bit serialized messages onto the communication line and a control unit for receiving the serialized messages and transferring the messages in parallel to a control center, a receiver transfer apparatus for use in the control unit comprising:

(a) a plurality of receivers, each tuned to a different frequency to receive a bit serialized message from a corresponding terminal unit transmitting a message at each receiver'"'"'s respectfully tuned frequency, each of said receivers including,

(1) a source of multiphase signals,

(2) means receiving said multiphase signals and responsive to the first bit of a received message for effecting the generation of a repetitive strobe signal, the strobe signal being generated upon the coincidence of said first bit and a one of said multiphase signals and all subsequent strobe signals being generated at the time of occurrence of another one of the multiphase signals,

(3) first delay means responsive to said strobe signal for generating a first delay pulse,

(4) first and second storage means, said first storage means, in response to the strobe signals, temporarily storing each message bit as it is received by said receiver, and said second storage means, in response to said first delay pulse, receiving the message bit previously stored in said first storage means prior to receipt of another message bit by said first storage means,

(b) means common to said plurality of receivers including;

(1) gate means including inhibit means for generating an inhibit pulse in response to the first strobe signal from the receiver receiving the earliest arrived serialized message bit from said terminal units, and to inhibit the generation of any subsequent inhibit pulse which may result from the strobe signals later applied to said gate means,

(2) second delay means for generating a second delay pulse in response to said inhibit pulse, said second delay pulse occurring at a specified point in time, after said inhibit pulse, to allow the latest arrived serialized message bit to be received in the first storage means of the receiver receiving the latest arrived message bit,

(3) clock signal generating means, in response to said second delay pulse, being enabled to sequentially generate at least first and second clock signals, the at least first one of said clock signals being applied to said first delay means of each of said receivers to force an early generation of the first delay pulse of the receiver receiving the latest message bit to effect a transfer of the message bit from that receiver'"'"'s first storage means into that receiver'"'"'s second storage means, and

(c) means in communication with the second storage means of each receiver, and responsive to said second clock signal for parallel transferring the stored message bits to said control center.