Memory protection arrangement
First Claim
1. In a computer control system including a random access memory means, said memory means having address and data communication terminals and an enable terminal whereby to selectively enable the input to said address and data terminals, a protection means for protecting the input and content of said memory means, said protection means comprising:
- a primary power supply means connected to supply energizing power to said memory means,a back-up power supply means,means directly responsive to a fault condition in said primary power supply means for transferring energization of said memory means from said primary power supply means to said back-up power supply means, andcontrol signal means for producing a control signal representative of the operating condition of said primary power supply means,said control signal means including a flip-flop circuit having an output terminal connected to said enable terminal of said memory means,said flip-flop circuit being responsive to a first signal derived from said primary power supply means indicative that said primary power supply means is operational to produce an enable signal for said memory means to enable said memory means to respond to signals applied to said address and data terminals,said flip-flop circuit being further responsive to a second signal derived from said primary power supply means indicative that said primary power supply means is not operational to produce a disable signal for said memory means to prevent said memory means from responding to signals applied to said address and data terminals.
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Accused Products
Abstract
A memory protection arrangement includes a primary power supply unit and a back-up battery. The back-up battery supplies maintenance energy to the memory itself, the battery being automatically effective whenever the primary power supply voltage decays to a value less than that of the battery. There is also provided apparatus which is responsive to a failure of the main power source to effect the application of a control signal to an input of the memory to disable the memory input from responding to spurious signals during a power-down condition.
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Citations
4 Claims
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1. In a computer control system including a random access memory means, said memory means having address and data communication terminals and an enable terminal whereby to selectively enable the input to said address and data terminals, a protection means for protecting the input and content of said memory means, said protection means comprising:
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a primary power supply means connected to supply energizing power to said memory means, a back-up power supply means, means directly responsive to a fault condition in said primary power supply means for transferring energization of said memory means from said primary power supply means to said back-up power supply means, and control signal means for producing a control signal representative of the operating condition of said primary power supply means, said control signal means including a flip-flop circuit having an output terminal connected to said enable terminal of said memory means, said flip-flop circuit being responsive to a first signal derived from said primary power supply means indicative that said primary power supply means is operational to produce an enable signal for said memory means to enable said memory means to respond to signals applied to said address and data terminals, said flip-flop circuit being further responsive to a second signal derived from said primary power supply means indicative that said primary power supply means is not operational to produce a disable signal for said memory means to prevent said memory means from responding to signals applied to said address and data terminals.
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2. In a computer control system including a random access memory means, said memory means having address and data communication terminals and an enable terminal whereby to selectively enable the input to said address and data terminals, a protection means for protecting the input and content of said memory means, said protection means comprising:
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an energizing bus connected to supply energizing power to said memory means, a primary power supply means connected to supply said energizing power to said bus, a back-up power supply means, means directly responsive to a fault condition in said primary power supply means for effectively transferring the energization of said bus from said primary power supply means to energization thereof by said back-up power supply means, control signal means for producing a control signal representative of the operating condition of said primary power supply means, said control signal means including a flip-flop circuit having an output terminal connected to said enable terminal of said memory means, said flip-flop circuit being responsive to a first signal derived from said primary supply means indicative that said primary power supply means is operational to produce an enable signal at the output terminal thereof for application to said memory means to enable said memory means to respond to signals applied to said address and data terminals, said flip-flop circuit being further responsive to a second signal indicative that said primary power supply means is not operational to produce a disable signal at the output terminal thereof for application to said memory means to prevent said memory means from responding to signals applied to said address and data terminals, and means connecting said flip-flop circuit to said bus to be energized therefrom whereby said flip-flop circuit and said memory means are energized through said bus from said primary power supply means whenever said primary power supply means is operational, and from said back-up power supply means whenever said primary power supply means is not operational.
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3. In a computer control system including a random access memory means, said memory means having address and data communication terminals and an enable terminal whereby to selectively enable the input to said address and data terminals, a protection means for protecting the input and content of said memory means, said protection means comprising:
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an energizing bus connected to supply energizing power to said memory means, a primary power supply means, a first unidirectional conductive device connecting said primary power supply means to said bus, a back-up power supply means, a second unidirectional conductive device connecting said back-up power supply means to said bus, said back-up power supply means having an output voltage slightly lower than that of said primary power supply means whereby to back-bias said second unidirectional conductive device whenever said primary power supply means is operational, said first unidirectional conductive device being back-biased and said second unidirectional conductive device being forwardly biased whenever said primary power supply means output voltage decreases to a value less than that of said back-up power supply means whereby to effect a transfer of the energization of said bus from said primary power supply means to said back-up power supply means upon such decrease in said output voltage from said primary power supply means, control signal means for producing a control signal representative of the operating condition of said primary power supply means, said control signal means including a flip-flop circuit having an output terminal connected to said enable terminal of said memory means, said flip-flop circuit being responsive to a first signal indicative that said primary power supply means is operational to produce an enable signal at the output terminal thereof for application to said memory means to enable said memory means to respond to signals applied to said address and data terminals, said flip-flop circuit being further responsive to a second signal indicative that said primary power supply means is not operative to produce a disable signal at the output terminal thereof for application to said memory means to prevent said memory means from responding to signals applied to said address and data terminals, and means connecting said flip-flop circuit to said bus to be energized therefrom whereby said flip-flop circuit and said memory means are energized through said bus from said primary power supply means whenever said primary supply means is operational, and from said back-up power supply means whenever said primary power supply means is not operational. - View Dependent Claims (4)
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Specification