Accurate single pin MOS RC oscillator

• US 4,122,413 A
• Filed: 10/26/1976
• Issued: 10/24/1978
• Est. Priority Date: 10/26/1976
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Chen, Carson L.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US05/735,913
• Time in Patent Office: 728 Days
• Field of Search: 331/108 D, 331/111, 331/113 R, 331/108 C
• US Class Current: 331/108.00D
• CPC Class Codes: H03K 3/3545 Stabilisation of output, e.g. using crystal
• CPC Class Codes: Y10S 331/03 Logic gate active element oscillator

Abstract

A series resistor-capacitor combination is coupled across a source of supply potential so that the capacitor will charge toward the supply potential through the resistor. The capacitor is discharged through a shunt connected switch that is operated by means of a latch. A pair of inverters coupled to the capacitor respond to the capacitor charge and operate through logic means to set and reset the latch. The inverters are made to have similar but different thresholds. When the capacitor charge is below both thresholds, the latch is set to turn the switch off so that the capacitor charges. When both thresholds are exceeded, the logic resets the latch to turn the switch on and discharge the capacitor. The capacitor therefore normally charges and discharges between the two thresholds and this threshold difference parameter is substantially independent of circuit fabrication variables.

Claims

1. An integrated circuit oscillator for use with an externally connected resistor-capacitor combination, said integrated circuit including a plurality of package pins, two of which are adapted for coupling to the terminals of a source of supply potential, said resistor-capacitor combination being adapted for series connection across said two pins with the juncture therebetween adapted for coupling to an integrated circuit package input pin, said integrated circuit comprising:

a pair of inverters having their inputs coupled to said input pin, said inverters being constructed to have similar but different threshold values;

switch means coupled to said package pins adapted for connection to said capacitor, said switch means when on being capable of discharging said capacitor; and

logic means comprising a two input AND gate having its inputs coupled to the outputs of said inverters, a two input NOR gate having its inputs coupled to the outputs of said inverters, and a latch having an output coupled to aid switch means, a reset input coupled to the output of said NOR gate and a set input coupled to the output of said AND gate, said logic means acting to turn said switch means on when the potential on said input pin exceeds the thresholds of both of said inverters and to turn said switch means off when the potential on said input pin is less than the thresholds of both of said inverters.

2. An RC oscillator comprising:

means for coupling a resistor and capacitor in series across a potential source;

a pair of inverters coupled to said capacitor, said inverters having threshold voltages that are different and that constitute an appreciable fraction of the value of said potential source;

a two input AND gate having its inputs coupled to the outputs of said pair of inverters;

a two input NOR gate having its inputs coupled to the outputs of said pair of inverters;

a latch having set and reset inputs and an output,

means for coupling said latch set input to the output of said AND gate;

means for coupling said latch reset input to the output of said NOR gate;

a transistor switch coupled across said capacitor terminals and having a control terminal that can render said switch conductive and non-conductive in response to the presence and absence of an applied control voltage; and

means for coupling said output of said latch to said control terminal of said transistor switch whereby said latch when set renders said transistor switch non-conductive and said capacitor charges until the thresholds of both inverters are exceeded whereupon said latch is reset to render said transistor switch conductive to discharge said capacitor.

3. The oscillator of claim 2 wherein said pair of inverters are configured to have similar threshold voltage levels and contain components ratioed to produce different threshold values.

4. The oscillator of claim 3 wherein each of said inverters comprises a pair of transistors having a size ratio which sets the input voltage threshold and said ratio is made different in the two circuits of said pair.

5. The oscillator of claim 4 wherein each of said inverters includes regenerative feedback such that when said threshold is reached, said inverter is rapidly driven into its maximum conduction state.