Apparatus for measuring water depth
First Claim
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1. An electronic underwater depth gauge comprising:
- unit pulse generating means for generating a unit pulse;
divider means connected to said unit pulse generating means for frequency dividing the pulse units generated by said pulse generating means;
first binary counter means connected at the inlet thereto to said divider means for further frequency dividing the pulses divided by said divider means;
sound wave generating and receiving means connected to said first binary counter means for generating and converting high frequency impulses from pulses from said first binary counter means into sound waves and for receiving and converting reflected sound waves into high frequency impulses;
a voltage source;
double switching means connected to said voltage source for directing the voltage from said voltage source, said switching means having first and second positions;
a first AND gate connected at the input thereinto to said first position of said double switching means and to said divider means;
an OR gate connected at the input thereto to said first AND gate;
binary counting and decoding means connected to said OR gate and to said wave generating and receiving means for counting pulses through said OR gate, for comparing said counted pulses from said OR gate and said wave generating and receiving means, and for converting said binary pulses to decimal signals and storing said decimal signals, said binary counting and decoding means further being connected to said first binary counter means for being reset by the pulses therefrom;
visual display means connected to said binary counting and decoding means for visually displaying the decimal signals stored therein;
a second AND gate connected at the input thereinto to said second position of said double switching means and at the outlet therefrom to said OR gate, said second AND gate further being connected to said unit pulse generating means;
second binary to decimal decoder means connected to said first binary counter means for converting the binary input signals from said counter means to a series of delayed decimal output pulses, said second decoder means having a plurality of outlets therefrom for said delayed pulses;
switching means connected to said second binary to decimal decoder means for selecting an output terminal from said decoder means; and
pulse setting means connected between said second AND gate and said switching means and further having pulse input from said unit pulse generating means for producing and directing a regulated pulse to said second AND gate based on said selected decimal output signals from said second binary to decimal decoder, whereby when said second AND gate receives in unison a voltage from said double switching means, and appropriate signals from said unit pulse generating means and said pulse setting means, and said second AND gate is opened to said OR gate.
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Abstract
An apparatus for measuring water depth comprising a range discrimination circuitry and an indication circuitry. The range discrimination circuitry includes a unit pulse generator, digital counters and digital gates. The indication circuitry includes a latch circuit, BCD-to-decimal decoders and indication lamps.
23 Citations
10 Claims
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1. An electronic underwater depth gauge comprising:
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unit pulse generating means for generating a unit pulse; divider means connected to said unit pulse generating means for frequency dividing the pulse units generated by said pulse generating means; first binary counter means connected at the inlet thereto to said divider means for further frequency dividing the pulses divided by said divider means; sound wave generating and receiving means connected to said first binary counter means for generating and converting high frequency impulses from pulses from said first binary counter means into sound waves and for receiving and converting reflected sound waves into high frequency impulses; a voltage source; double switching means connected to said voltage source for directing the voltage from said voltage source, said switching means having first and second positions; a first AND gate connected at the input thereinto to said first position of said double switching means and to said divider means; an OR gate connected at the input thereto to said first AND gate; binary counting and decoding means connected to said OR gate and to said wave generating and receiving means for counting pulses through said OR gate, for comparing said counted pulses from said OR gate and said wave generating and receiving means, and for converting said binary pulses to decimal signals and storing said decimal signals, said binary counting and decoding means further being connected to said first binary counter means for being reset by the pulses therefrom; visual display means connected to said binary counting and decoding means for visually displaying the decimal signals stored therein; a second AND gate connected at the input thereinto to said second position of said double switching means and at the outlet therefrom to said OR gate, said second AND gate further being connected to said unit pulse generating means; second binary to decimal decoder means connected to said first binary counter means for converting the binary input signals from said counter means to a series of delayed decimal output pulses, said second decoder means having a plurality of outlets therefrom for said delayed pulses; switching means connected to said second binary to decimal decoder means for selecting an output terminal from said decoder means; and pulse setting means connected between said second AND gate and said switching means and further having pulse input from said unit pulse generating means for producing and directing a regulated pulse to said second AND gate based on said selected decimal output signals from said second binary to decimal decoder, whereby when said second AND gate receives in unison a voltage from said double switching means, and appropriate signals from said unit pulse generating means and said pulse setting means, and said second AND gate is opened to said OR gate. - View Dependent Claims (2, 3, 4, 5, 7, 8, 9, 10)
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6. a third binary counter means connected to said unit pulse generating means for counting unit pulses generated by said pulse generating means;
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a flip flop switch means receiving output from and providing input into said third binary counter means and also connected between said switching means and said second AND gate, said flip flop switch means producing a pulse from said second bianry to decimal decoder means to said second AND gate regulated in sequence by the unit pulses counted by said third binary counter means.
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Specification