Apparatus for detecting defects in patterns

• US 4,123,170 A
• Filed: 12/01/1976
• Issued: 10/31/1978
• Est. Priority Date: 11/26/1975
• Status: Expired due to Term

• Current Assignee: Nippon JIDO Seigyo Limited
• Original Assignee: Nippon JIDO Seigyo Limited
• Inventors: Awamura, Daikichi, Uchiyama, Yasushi
• Primary Examiner(s): Corbin, John K.
• Assistant Examiner(s): Rosenberger, R. A.
• Application Number:
  US05/746,584
• Time in Patent Office: 699 Days
• Field of Search: 356/167, 356/168, 250/563
• US Class Current: 356/394
• CPC Class Codes: G01B 9/08 Optical projection comparators
• CPC Class Codes: G01N 21/95607 using a comparative method

Abstract

An apparatus for detecting defects in patterns, particularly defects in chip patterns of photomasks used for manufacturing semi-conductor integrated circuits comprises means such as a flying spot scanner for producing a scanning light spot, an optical system for projecting said scanning light spot simultaneously on to identical portions of two patterns to be compared with each other, said patterns being placed on a carrier stage, first and second photoelectric converters, each converter receiving the light spot passing through or reflected from a respective pattern to produce an output electrical signal; and an electric circuit for receiving the output signals from said first and second photoelectric converters and subtracting one of them from the other to produce a difference signal which represents detected defects in the patterns. The electric circuit means further comprise a delay circuit for delaying before subtraction one of the signals from the photoelectric converters or delaying said difference signal by a predetermined time period so as to delete pseudo-defects in the patterns.

Claims

1. An apparatus for detecting defects in patterns, particularly defects in chip patterns of photomasks used in manufacturing semiconductor integrated circuits comprising means for producing a scanning light spot;

an optical system for projecting said scanning light spot simultaneously onto identical portions of two patterns to be compared with each other;

first and second photoelectric converters each for receiving the light spot passing through or reflected from a respective pattern to produce an output electrical signal; and

electric circuit means for receiving the output signals from the first and second photoelectric converters and subtracting one of the output signals from the other to produce an output defect signal representing detected defects in the patterns;

said circuit means comprising;

a subtracting circuit for producing a difference signal between the two output signals from the first and second photoelectric converters,

a delay circuit for delaying the difference signal for a predetermined time period so as to remove pseudo-defects from the output defect signal, and

circuit means for receiving the delayed difference signal and the non-delayed difference signal and processing them to produce the output defect signal having pseudo-defects deleted therefrom.

2. A defect detecting apparatus according to claim 1, wherein said apparatus further comprises a carrier stage on which a specimen having a number of identical patterns is placed and said optical system is so arranged that two patterns in the specimen are simultaneously scanned by the scanning light spot.

3. A defect detecting apparatus according to claim 2, wherein said scanning light spot producing means comprise a flying light spot cathode ray tube and first and second lenses arranged symmetrically with respect to an axis which passes through a middle point between the two patterns to be compared with each other;

whereby the scanning light spot is projected onto one of the patterns by means of said first lens and onto the other pattern by means of said second lens.

4. A defect detecting apparatus according to claim 3, wherein a distance between the first and second lenses is made adjustable.

5. A defect detecting apparatus according to claim 2, wherein said electric circuit means comprise a defect identification circuit which determines to which pattern of the two patterns being compared the detected defect belongs.

6. A defect detecting apparatus according to claim 5, wherein the electric circuit means further comprise a counter for counting the number of the detected defects for each patttern.

7. A defect detecting apparatus according to claim 1, wherein said electric circuit means further comprises a monitor having a screen on which any one of images of the detected defects and the portions of the two patterns is displayed.

8. A defect detecting apparatus according to claim 1, wherein said delay circuit comprises a first delay element for delaying the difference signal for a part of a line period of a raster scanning, a first AND gate for receiving the delayed and non-delayed difference signals;

a second delay element for delaying an output signal from the first AND gate for one line period and a second AND gate for receiving the delayed and non-delayed output signal from the first AND gate to produce the defect signal which has not pseudo-defects.

9. An apparatus for detecting defects in patterns, particularly defects in chip patterns of photomasks used in manufacturing semiconductor integrated circuits comprising means for producing a scanning light spot;

an optical system for projecting said scanning light spot simultaneously onto identical portions of two patterns to be compared with each other;

first and second photoelectric converters each for receiving the light spot passing through or reflected from a respective pattern to produce an output electrical signal; and

electric circuit means for receiving the output signals from the first and second photoelectric converters and subtracting one of the output signals from the other to produce an output defect signal representing detected defects in the patterns;

said circuit means comprising;

a delay circuit for delaying the output signal from said first photoelectric converter by a predetermined time period;

circuit means for receiving the delayed output signal and the non-delayed output signal from said first photoelectric converter and processing them to produce a composite output signal; and

a subtracting circuit for subtracting the output signal from the second photoelectric converter from the composite output signal of said circuit means so as to produce the output defect signal having pseudo-defects removed therefrom.

10. An apparatus for detecting defects in patterns, particularly defects in chip patterns of photomasks used in manufacturing semiconductor integrated circuits comprising means for producing a scanning light spot;

an optical system for projecting said scanning light spot simultaneously onto identical portions of two patterns to be compared with each other;

first and second photoelectric converters each for receiving the light spot passing through or reflected from a respective pattern to produce an output electrical signal; and

electric curcuit means for receiving the output signals from the first and second photoelectric converters and subtracting one of the output signals from the other to produce a defect signal representing detected defects in the patterns, said electric circuit means including means for determining whether difference signals created by the subtraction of said output signals have a signal width exceeding a predetermined value and for deleting said difference signals from said defect signal if they do not to produce a defect signal having pseudo-defects removed therefrom.