Multisegment Hall element for offset voltage compensation

• US 4,123,772 A
• Filed: 05/31/1977
• Issued: 10/31/1978
• Est. Priority Date: 06/18/1973
• Status: Expired due to Term

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Janssen, Johannes H. H.
• Primary Examiner(s): Larkins, William D.
• Application Number:
  US05/801,924
• Time in Patent Office: 518 Days
• Field of Search: 357/27, 357/36, 357/46, 357/48, 357/51, 307/309, 330/6
• US Class Current: 257/427
• CPC Class Codes: H10B 61/00 Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• CPC Class Codes: H10N 52/101 Semiconductor Hall-effect devices
• CPC Class Codes: H10N 59/00 Integrated devices, or assemblies of multiple devices, comprising at least one galvanomagnetic or Hall-effect element covered by groups H10N50/00 - H10N52/00 MRAM devices H10B61/00

Abstract

A semiconductor device having a Hall element in which, in order to reduce the offset, the Hall element consists of an even number of sub-Hall elements provided in one semiconductor body and the anode and cathode contacts of which are connected together, which sub-Hall elements each have a Hall contact, and in which one half of the Hall contacts is of one polarity and the other half is of the opposite polarity. The sub-Hall elements are divided into groups of each two sub-Hall elements with mutually parallel main current directions, and Hall contacts of the same polarity are connected together. The sub-Hall elements advantageously have a common Hall body in the form of a square of another regular polygon, in which the contacts are placed along the edge of the Hall body.

Claims

1. A Hall device with substantially suppressed offset voltage comprising a layer-shaped semiconductor body having a central portion and a peripheral portion surrounding said central portion, an even number of at least four current contact members forming a plurality of pairs of anode and cathode contact members distributed in said peripheral portion in alternate spaced arrangement, each cathode contact member being situated between two anode contact members a plurality of pairs of Hall contact members of opposite polarities forming the same even number of Hall contact members distributed in said peripheral portion in alternate spaced arrangement, each Hall contact of one polarity being situated between two Hall contacts of the opposite polarity, only one single Hall contact being present between each pair of successive anode and cathode current contact members and equidistant therefrom thus forming a plurality of adjacent arranged Hall sub-elements, the main current direction between each pair of successive anode and cathode contacts being substantially parallel to the main current direction between an associated pair of anode and cathode contacts situated diametrically opposite on the body, all anode contact members being connected to one single anode input terminal, all cathode contact members being connected to one single cathode input terminal, all Hall contact members of one polarity being connected to one single first Hall output terminal and all Hall contact members of the opposite polarity being connected to one single second Hall output terminal.

2. A semiconductor Hall device as in claim 1, wherein the two associated said Hall sub-elements have oppositely directed main current directions and Hall contacts of the same polarity.

3. A semiconductor Hall device as in claim 1, wherein the two said Hall sub-elements of each said group have main current directions in the same direction and Hall contacts of opposite polarity.

4. A semiconductor Hall device as in claim 3, wherein said Hall sub-elements comprising Hall contacts of the same polarity have respective main current directions in which the sum of the cosines of the double of the angle between each said main current direction and any reference axis parallel to the surface is substantially equal to zero.

5. A semiconductor Hall device as in claim 1, wherein said Hall sub-elements comprise one common Hall body.

6. A semiconductor Hall device as in claim 5, wherein said Hall contacts are disposed along the edge of said Hall body.

7. A semiconductor Hall device as in claim 5, wherein said semiconductor body comprises a substrate of one conductivity type and an expitaxial layer of the opposite conductivity type present on said substrate and said Hall body comprises an island-shaped part of said epitaxial layer, which part is surrounded by an insulation zone that electrically isolates said part from the remaining part of said epitaxial layer.

8. A semiconductor Hall device as in claim 1, comprising further semiconductor circuit elements provided in said epitaxial layer.

9. A semiconductor Hall device as in claim 5, wherein said current contacts on the Hall body are present at the corners of a first regular polygon in which, proceeding along the current contacts, each said anode contact is present between two said cathode contacts, and said Hall contacts are placed at the corners of a second regular polygon having the same number of corners as said first polygon and being concentric with said first polygon.

10. A semiconductor Hall device as in claim 9, wherein said Hall contacts are present at respective corners of a square and said current contacts are present substantially at the centers of respective sides of said square.

11. A semiconductor Hall device as in claim 9, wherein said current contacts are present at respective corners of a square and said Hall contacts are present substantially at the centers of respective sides of said square.

12. A semiconductor Hall device as in claim 9, wherein the edges of said Hall body contain notches which extend between respective said current contacts and Hall contacts.