×

Computer vector register processing

  • US 4,128,880 A
  • Filed: 06/30/1976
  • Issued: 12/05/1978
  • Est. Priority Date: 06/30/1976
  • Status: Expired due to Term
First Claim
Patent Images

1. Vector processing apparatus for a computer having a main memory, comprising:

  • a plurality of vector registers each including means for holding a plurality of elements of an ordered set of data;

    at least one arithmetic or logical functional unit having an input for receiving operands and an output for delivering results, said functional unit including segmented means for holding data for operations not yet completed while receiving operands for successive operations;

    path select means associated with said vector registers and responsive to program instructions for selectively connecting individual vector registers for transmission of data to or from said main memory, and for selectively connecting individual vector registers for transmitting data as operands to a functional unit and for receiving results from a functional unit; and

    control means associated with said vector registers and responsive to program instructions, said control means being operative in conjunction with a vector register selected as an operand register in a vector processing operation to successively transmit the elements of the ordered set of data from the vector register to a functional unit on successive clock periods, said control means being operative in conjunction with a vector register selected as a result register in a vector processing operation to receive and store successive results transmitted from a functional unit as elements of an ordered set of data representing a result vector, on successive clock periods following delivery of the first result from the functional unit.

View all claims
  • 5 Assignments
Timeline View
Assignment View
    ×
    ×