Thin silicon devices

• US 4,131,985 A
• Filed: 06/24/1977
• Issued: 01/02/1979
• Est. Priority Date: 08/31/1976
• Status: Expired due to Term

• Current Assignee: ITT Industries (ITT, Inc.)
• Original Assignee: ITT Industries (ITT, Inc.)
• Inventors: Young, John M., Greenwood, John C.
• Primary Examiner(s): Tupman, W.
• Application Number:
  US05/809,583
• Time in Patent Office: 557 Days
• Field of Search: 29/580, 29/576 IW, 29/590, 29/589, 156/657, 156/662, 156/649, 156/628, 156/647
• US Class Current: 438/406
• CPC Class Codes: H01L 21/30604 Chemical etching
• CPC Class Codes: H01L 2224/8319 Arrangement of the layer connectors prior to mounting
• CPC Class Codes: H01L 2224/8385 using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 24/26 Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/07802 not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/15787 Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: Y10S 438/924 To facilitate selective etching
• CPC Class Codes: Y10S 438/973 Substrate orientation

Abstract

This relates to a semiconductor device and method for making same. At least one semiconductor device is formed in a polished silicon slice, and the device is framed by a deep diffusion of boron. The surface of the slice is then coated with a layer of silicon nitride, and a glass ceramic body is bonded to the silicon nitride layer. The device is next isolated by isotropic etching, and the silicon from beneath the device is removed with a selective etch so that metal interconnections can be made to the underside of the device.

Claims

1. A method of making a semiconductor structure, comprising:

forming at least one semiconductor device on a surface of a polished silicon slice;

framing said at least one device with a deep diffusion of boron;

bonding a substrate to the surface of the polished silicon slice;

isolating said at least one device by isotropic etching of the silicon slice about the boron diffused frame to form an isolating moat; and

removing the silicon from beneath said at least one device using selective lateral etching of the silicon slice from the moat so as to expose said device.

3. A method as described in claim 1, additionally comprising the step of coating the surface of said slice with a layer of silicon nitride prior to bonding the substrate to the surface of the polished silicon slice.

4. A method as described in claim 1, additionally comprising the step of forming metal interconnections to the underside of said at least one device after removing the silicon therefrom.

2. A method of making a semiconductor structure including:

forming at least one semiconductor device in the surface of a polished 111 silicon slice;

framing said at least one device with a deep diffusion of boron;

bonding a substrate to the surface of the polished silicon slice;

isolating said at least one device by isotropic etching of said silicon slice around the boron diffused frame to form a moat; and

removing silicon from beneath said at least one device utilizing selective lateral etching of the 111 silicon slice from the moat.

5. A method as described in claim 2, additionally comprising the step of forming metal interconnections to the underside of said at least one device after removing the silicon therefrom.

6. A method as described in claim 2, additionally including the step of coating the surface with a layer of silicon nitride prior to bonding the substrate to the surface of the polished silicon slice.

7. A method as described in claim 2, additionally comprising the step of forming polycrystalline silicon interconnectors to said device prior to framing said at least one device with a deep diffusion of boron.

8. A method of making a semiconductor structure including:

forming at least one semiconductor device in the surface of a polished silicon slice;

framing said at least one device with a deep diffusion of boron;

coating the surface of said slice with a layer of silicon nitride;

fusing the surface of said slice by way of said silicon nitride layer to a glass ceramic material in its glass phase;

devitrifying said glass ceramic material to form a ceramic layer;

isolating said at least one device by isotropic etching; and

removing the silicon from beneath said at least one device with a selective etch so as to expose said device.

9. A method of making a semiconductor structure including:

forming at least one semiconductor device in the surface of a polished 111 silicon slice;

forming polycrystalline silicon interconnectors to said device;

framing said at least one device with a deep diffusion of boron;

coating said surface with a layer of silicon nitride;

fusing the surface of said slice by way of said silicon nitride layer to a glass ceramic material in its glass phase;

devitrifying said glass ceramic material to form a ceramic layer;

isolating said at least one device by isotropic etching of said silicon slice around the boron diffused frame;

removing silicon from beneath said at least one device with a selective etch; and

forming metal interconnections to the underside of said at least one device.

10. A method of making a semiconductor structure including:

forming at least one semiconductor device on the surface of a polished 111 silicon slice;

framing said at least one device with a deep diffusion of boron;

coating said surface with a layer of silicon nitride;

fusing the surface of said slice by way of said silicon nitride layer to a glass ceramic material in its glass phase;

devitrifying said glass ceramic material to form a ceramic layer;

isolating said at least one device by isotropic etching of said silicon slice around the boron diffused frame; and

removing silicon from beneath said at least one device with a selective etch.