Gas encapsulated cooling module

• US 4,138,692 A
• Filed: 09/12/1977
• Issued: 02/06/1979
• Est. Priority Date: 09/12/1977
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Segal, Zvi, Scanlon, William J., Meeker, Robert G.
• Primary Examiner(s): James, Andrew J.
• Application Number:
  US05/832,716
• Time in Patent Office: 512 Days
• Field of Search: 357/82, 357/81, 357/76, 357/79, 174/15, 165/80, 165/105
• US Class Current: 257/697
• CPC Class Codes: H01L 23/4332 Bellows
• CPC Class Codes: H01L 23/44 the complete device being wholly immersed in a fluid other than air H01L23/427 takes precedence
• CPC Class Codes: H01L 23/473 by flowing liquids H01L23/4332, H01L23/4338 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A gas encapsulated cooling module wherein at least one semiconductor chip to be cooled is supported on a substrate portion of the module the provision of a heat sink stud having a planar surface in thermal contact with a planar surface of the chip to be cooled, said stud being supported by a resilient thermally conductive bellow-like structure, whereby the planar surface of the stud is maintained in intimate thermal contact with the planar surface of the chip.

Claims

1. A cooling module for integrated circuit chips, said cooling module comprising:

a multilayer ceramic substrate having a first essentially planar surface and a second essentially planar surface, said multilayer ceramic substrate including an electrical circuit pattern contained therein and on at least one of said planar surface;

a plurality of integrated circuit chips supported on said first planar surface of said substrate and electrically connected to said electrical circuit pattern of said multilayer ceramic substrate, each of said semiconductor chips having an essentially exposed planar surface;

a plurality of electrically conductive connector pins extending from said second planar surface of said substrate, said plurality of electrically conductive pins being electrically connected to said electrical circuit pattern of said substrate;

module cap means hermetically sealed to said substrate to provide a volume encompassing said plurality of chips;

a plurality of bellows like structures, each of said bellows like structures extending from the exposed planar surface of a discrete one of said chips to said module cap means; and

a cooling medium contained within said hermetically sealed volume formed by said substrate and said module cap means.

2. A cooling module for integrated circuit chips as recited in claim 1, wherein each of said bellows like structures includes a thermally conductive element having a planar surface, and said planar surface of each said thermally conductive element is positioned in at least close physical proximity to the exposed planar surface of a discrete one of said integrated circuit chips.

3. A cooling module for integrated circuit chips as recited in claim 1, wherein said module cap means has an essentially planar internal surface, said internal planar surface of said module cap means being essentially co-extensive with and extending parallel to said planar surfaces of said substrate;

a plurality of recesses in said internal planar surface of said module cap means;

each of said recesses being in alignment with the exposed planar surface of a discrete one of said integrated circuit chips and partially encompassing a portion of a corresponding one of said bellows like structures.

4. A cooling module for integrated circuit chips as recited in claim 1, wherein the hermetically sealed volume containing said cooling medium includes the volume within each of said bellows like structures.

5. A cooling module for integrated circuit chips as recited in claim 1, wherein the cooling medium is a fluid, such as a flourocarbon or water.

6. A cooling module for integrated circuit chips as recited in claim 1, wherein the cooling medium is an inert gas, such as helium.

7. A cooling module for integrated circuit chips as recited in claim 1 wherein each said bellows like structure is an elongated structure having a first enclosed end adjacent a chip exposed planar surface and a second open end in communication with a further cooling medium wholly contained within said module cap means.

8. An electronic packaging structure for semiconductor integrated circuit chips, said structure having enhanced heat dissipating capability;

said packaging structure comprising;

a planar structure having first and second surfaces, said planar structure having contacts on said first and second surfaces, said planar structure including electrical conductors electrically interconnecting said contacts in a predetermined manner;

a plurality of semiconductor integrated circuit chips disposed on said first surface of said planar structure;

connection means electrically connecting each of said chips to selected contacts on said first surface of said planar structure;

a plurality of thermally conductive bellows like structures, each of said bellows like structures forming a thermal interface with a discrete one of said plurality of chips, whereby a plurality of paths each having low thermal resistance are provided, each said low resistance path including, in the order recited, a semiconductor chip, a chip/bellows like structure interface and a bellows like structure; and

a single heat sink structure thermally coupled to each of said paths having low thermal resistance.

9. An electronic packaging structure for semiconductor integrated circuit chips as recited in claim 8, wherein said single heat sink includes a cooling jacket containing a cooling liquid.

10. An electronic packaging structure for semiconductor integrated circuit chips as recited in claim 9, wherein each of said bellows like structures has a first portion and a second portion integral with said first portion, where said first portion of each bellows like structure forms said thermal interface with a discrete of one of said chips and said second portion of each said bellows like structure is exposed to the cooling liquid in said cooling jacket.

11. An electronic packaging structure for semiconductor integrated circuit chips as recited in claim 10, wherein said cooling jacket contains a baffle structure for directing the circulation of said cooling liquid to said second portions of said bellows like structures.

12. An electronic packaging structure for semiconductor integrated circuit chips as recited in claim 10, wherein said cooling jacket includes means for directing cooling liquid directly to and from each of said second portions of said bellows like structures.

13. An electronic packaging structure for semiconductor integrated circuit chips as recited in claim 10, wherein said single heat sink structure is a portion of a package cover hermetically sealed to said planar structure, said cover providing a first volume utilized as said cooling jacket and a second volume hermetically sealed from said first volume;

said second volume having exposed therein at least a portion of each of said chips and at least a portion of each of said first portions of said bellows like structures, said second volume containing under pressure an inert thermally conductive fluid.

14. An electronic packaging structure for integrated circuit chips as recited in claim 13, wherein said inert thermally conductive fluid is helium.

15. An electronic packaging structure for integrated circuit chips as recited in claim 13 wherein said inert thermally conductive fluid is a fluorocarbon.