Electric controller system with bumpless transfer
First Claim
1. An electric controller system comprising:
- comparator means;
means for feeding a measurement signal to an input of said comparator means;
a processor having an input coupled to said comparator means and including means arranged to (a) convert signals received from said comparator means to corresponding digital input signals, (b) perform digital operations on such digital input signals to produce corresponding digital output signals; and
(c) develop a control output signal;
said processor performing said analog-to-digital conversion and said digital operations respectively during first and second parts of each of successive operating cycles;
a digital/analog converter for converting said digital output signals of said processor to analog output signals;
circuit means coupling said analog output signal of said digital/analog converter to a second input of said comparator means;
an analog signal hold means coupled to the output of said digital/analog converter to hold the output thereof;
means responsive to said processor control signal for activating said hold means;
manual control means connected to the input of said analog signal hold means;
means operable to switch said manual control means into manual control mode wherein said manual control means is enabled to control the signal held by said analog signal hold means;
means for feeding the output signal of said analog signal hold means to a third input of said comparator means;
whereby in manual mode said processor can develop digital output signals responsive to said output signal of said analog signal hold means.
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Accused Products
Abstract
An electric controller system includes a comparator at the input of a processor, the processor including a program memory, an operation control unit and a data memory. A digital/analog converter is provided at the processor output. Analog/digital conversion is by means of a loop including the processor, digital/analog converter and comparator. The digital/analog output is also received by an analog signal hold means, the output of which is fed back to the comparator. A manual control circuit operable only in a manual control mode provides an alternative input to the analog signal hold means. Computations in the processor are thus based on a manual input through the hold circuit and comparator only during the manual control mode. Bumpless switching from the manual mode to an automatic mode is provided while further providing for a manual output with failure of the processor. Further embodiments include a multiplexer at the input, a plurality of hold circuits and parameter setting circuits at the input.
26 Citations
10 Claims
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1. An electric controller system comprising:
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comparator means; means for feeding a measurement signal to an input of said comparator means; a processor having an input coupled to said comparator means and including means arranged to (a) convert signals received from said comparator means to corresponding digital input signals, (b) perform digital operations on such digital input signals to produce corresponding digital output signals; and
(c) develop a control output signal;
said processor performing said analog-to-digital conversion and said digital operations respectively during first and second parts of each of successive operating cycles;a digital/analog converter for converting said digital output signals of said processor to analog output signals; circuit means coupling said analog output signal of said digital/analog converter to a second input of said comparator means; an analog signal hold means coupled to the output of said digital/analog converter to hold the output thereof; means responsive to said processor control signal for activating said hold means; manual control means connected to the input of said analog signal hold means; means operable to switch said manual control means into manual control mode wherein said manual control means is enabled to control the signal held by said analog signal hold means; means for feeding the output signal of said analog signal hold means to a third input of said comparator means; whereby in manual mode said processor can develop digital output signals responsive to said output signal of said analog signal hold means. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification