Vehicle locator system

• US 4,152,693 A
• Filed: 04/25/1977
• Issued: 05/01/1979
• Est. Priority Date: 04/25/1977
• Status: Expired due to Term

• Current Assignee: Security Response, LLC
• Original Assignee: Audio Alert, Inc.
• Inventors: Ashworth, Charles S. Jr.
• Primary Examiner(s): Caldwell, Sr., John W.
• Assistant Examiner(s): Groody, James J.
• Application Number:
  US05/790,265
• Time in Patent Office: 736 Days
• Field of Search: 340/23, 340/25, 340/24, 364/443, 364/436, 364/460, 364/424, 325/53, 325/117
• US Class Current: 340/990
• CPC Class Codes: G08B 25/10 using wireless transmission systems G08B25/009 takes precedence
• CPC Class Codes: G08G 1/13 the indicator being in the form of a map

Abstract

A positional display system for visually indicating given geographical locations such as the position of motor vehicles such as police cars and/or the location of the occurrence of an incident warranting police attention. The system includes a display board having a row and column matrix of individual lights and a map of the local geographic area of concern overlaying the matrix so that each light represents a unique map section. Whenever a patrol car transmits its position to a central station or a remote alarm indicates the occurrence of a robbery or the like, information indicative of the row and column address of the given location and at least one instructional command for determining the light status are entered. The entered information is converted into binary numbers indicative of the row and column addresses and the converted binary numbers are temporarily stored. The stored numbers are compared with the output of a scanning counter. The comparator outputs are gated to enable the instructional command for determining the status of the lights to be entered into a memory whenever the entered row and column address is scanned by the counter. The scanning counter is also coupled to a row decoder which sequentially generates the series of individual row scan signals and to a column decoder which sequentially generates a series of column scan signals. These signals are gated with the output of the memory and used to address corresponding rows and columns of the matrix so that when each row and column light is addressed, its illumination status will be determined by the memory output in accordance with the instructional command. If the location of the police cars are entered with an instructional command specifying a steady light condition and the location of an incident is entered with an instructional command specifying a blinking light, the person observing a display board will observe the locations of all patrol cars as steady lights and the location of the incident as a blinking light and will be able to determine which car is closest to the location of the incident for facilitating command and control dispatching decisions and the like.

Claims

1. A positional display system of visually indicating a given location such as the location of a motor vehicle such as a plice car or the location of the occurrence of an incident warranting police attention to aid in making command and control decisions, said positional display system comprising:

a display board including a row and column matrix of individual lights and a map overlaying said matrix so that each of said individual lights represents a unique locational area of said map;

means for inputting a sequence of decimal digits of information including a first set of decimal digits indicative of the specific row address of a given locational area of said map, a second set of decimal digits indicative of the specific column address of a given locational area of said map and a third set of at least one command digit for determining the desired status of illumination of the individual light located at said given row and column address on said display board;

means for converting each of said sets of decimal digits of information into their binary equivalents such that said first set of decimal digits is represented by a first binary number having "m" bit positions, said second set of decimal digits is represented by a second binary number having "n" bit positions and said third set of at least one command digit is represented by a third binary number;

means for temporarily storing said binary numbers, said storage means including a first set of outputs for outputting said first binary number, a second set of outputs for outputting said second binary number and means responsive to a first value of said command digit for generating a "light on" signal and to a second value of said command digit for generating a "light off" signal;

scanning means including a 2^m+n bit binary up counter having a first set of "m" outputs corresponding to the first "m" bit positions of the counter and a second set of "n" outputs corresponding to the next successive "n" bit positions of the counter;

row comparator means having a first set of comparator inputs coupled to the first set of outputs of said temporary storage means, a second set of comparator inputs coupled to said first set of "m" outputs of said binary up counter and a comparator output for supplying a "row equal" signal when equivalency exists between said row comparator inputs;

column comparator means having a first set of comparator inputs coupled to said second set of outputs of said temporary storage means, a second set of comparator inputs coupled to said second set of "n" outputs of said binary up counter and a comparator output for supplying a "column equal" signal when equivalency exists between said column comparator inputs;

memory means having at least 2^m row by 2ⁿ column memory locations, input means coupled to said first set of "m" outputs of said binary up counter for scanning said row addresses in said memory and to said second set of "n" outputs of said binary up counter for scanning said column addresses, said memory means further including a write input coupled to said temporary storage means for presenting said "light on" signal and said "light off" signal thereto and a write enable port responsive to the presence of a "write enable" signal for enabling said memory means to write said "light on" and "light off" signals into the memory location then being addressed by said scanning means and a memory output for reading out the "lights on" or "lights off" signal stored in each of said memory locations;

gating means coupled to the outputs of said row and column comparator means for generating a "write enable" signal when said "row equal" and said "column equal" signals exist simultaneously;

row decoder means coupled to said first set of "m" outputs of said scanning means for sequentially addressing the rows of said matrix;

column decoder means coupled to said "n" outputs of said scanning means for sequentially addressing the 2ⁿ columns of said matrix; and

logical gating means responsive to the output of said row decoder means, the output of said column decoder means, and the output of said memory means for sequentially addressing each of said lights in said matrix and for selectively energizing a given light in said row and column matrix when the command digit entered with said given row and column coordinate so dictates thereby visually displaying the location of said motor vehicle or incident on said display board for command and control purposes.

2. The positional display system of claim 1 wherein each of said individual lights of said row and column matrix includes a light-emitting diode and said row and column matrix further includes a darlington amplifier associated with each of said light emitting diodes, the base input of said darlington amplifier being connected to a control input while the commonly coupled collectors of said darlington amplifier are connected to a source of potential and the output emitter is coupled to the anode of said light emitting diode whose cathode is resistively coupled to ground.

3. The positional display system of claim 2 wherein said light emitting diode and darlington amplifier circuitry further includes an input diode having its anode connected to the control input for controlling the operation of the light emitting diode and its cathode connected to a base input of said darlington amplifier, the cathode of said input diode and the base of said input darlington transistor being capacitively coupled to ground for smoothing out flicker problems in closed circuit television applications.

4. The positional display system of claim 1 wherein said inputting means includes a manually operable ten-key keyboard for manually entering in a serial manner the decimal digits zero through nine as required for defining the row and column coordinates of a given location and the desired status of illumination of the individual light corresponding thereto.

5. The positional display system of claim 1 wherein said inputting means includes a plurality of card media each of which has encoded thereon the locational row and column coordinates of a given location at which an incident warranting police attention may occur and a card reader means for reading the encoded information stored on one of said card media for inputting said sets of decimal digits of information when one of said card media corresponding to the location of the occurrence of an incident warranting police attention is selectively fed into said card reading means.

6. The positional display system of claim 1 wherein said inputting means includes an acoustical tone decoder for generating said decimal digits of information in response to incoming audio tone signals.

7. The positional display system of claim 6 wherein said inputting means further includes a two-line to ten-line telephone audio tone generator for supplying said input tones.

8. The positional display system of claim 6 wherein said inputting means further includes an intercom system for inputting said audio tones to said acoustical decoder.

9. The positional display system of claim 6 wherein said inputting means further includes a radio receiver for receiving radio signals and inputting the audio tones resulting therefrom to said acoustical decoder.

10. The positional display system of claim 1 wherein said decimal to binary converting means includes means for sequentially receiving one decimal digit of inputted information at a time and for converting that decimal digit of information into a four bit binary coded decimal number having a 1'"'"'s position value, a 2'"'"'s position value, a 4'"'"'s position value and an 8'"'"'s position value, said converting means further including delay circuitry means for generating a shift pulse in response to the completion of conversion of each of said decimal digits into its binary coded decimal equivalent and means for preventing the entry of additional decimal digits of information until the decimal digit currently being inputted has been converted and said shift pulse generated.

11. The positional display system of claim 1 wherein said inputting means includes a ten-key decimal keyboard having one key for each of the decimal digits zero through nine, said converting means including encoding means having eight inputs corresponding to the decimal digits zero through seven and three binary outputs corresponding to the 1'"'"'s, 2'"'"'s and 4'"'"'s binary bit positions for converting the unique decimal digit input into a corresponding binary output, said converting means also including a first logical "OR" gate having its output connected to the zero input of said encoding means, a second logical "OR" gate having is output connected to the one input of said encoder means, one input of said first logical "OR" gate being coupled to said zero key of said input means and the other input of said first logical "OR" gate being connected to said eight key, one input of said second "OR" gate being connected to said one key of said input means and the other input of said second "OR" gate being connected to said nine key, said converting means further including a first logical "NOR" gate having first and second gate inputs and a gate output, a second logical "NOR" gate having first and second gate inputs and a gate output, and a third logical "NOR" gate having first and second gate inputs and a gate output, said first input of said first "NOR" gate being connected to said eight key and said second input of said first "NOR" gate being connected to said nine key, said output of said first logical "NOR" gate being connected to said first input of said second logical "NOR" gate said output of said second "NOR" gate serving to provide the 8'"'"'s binary bit position of said converted number, said second input of said second logical "NOR" gate being connected to the inverted output of said third logical "NOR" gate and, said first input of said third "NOR" gate being connected to said 2'"'"'s binary bit position output and said second input of said third "NOR" gate being connected to said 4'"'"'s binary bit position output of said encoding means.

12. The positional display system of claim 11 wherein said encoding means includes a first encoder output for supplying a first signal when one of said keys are depressed for entering a decimal digit of information, said encoding means also including means for generating a shift pulse including a resistor coupled between said first encoder output and a common node, a capacitor coupled between said common node and ground for providing a settling effect to said shift pulse generating circuit, a first logical "OR" gate having its commonly coupled inputs connected to said common node, and a second capacitor connected between said common node and the output of said first logical "OR" gate said encoding means further including a second logical "OR" gate having its commonly coupled inputs connected to the output of said first logical "OR" gate for buffering the output thereof and supplying said shift pulse at the output of said second "OR" gate upon the completion of conversion of each of said decimal digits information into binary coded decimal form.

13. The positional display system of claim 11 wherein said temporary storage means includes a 1'"'"'s position shift register having its input connected to the 1'"'"'s position output of said decimal to binary converting means, a 2'"'"'s position shift register having its input connected to the 2'"'"'s position output of said decimal to binary converting means, a 4'"'"'s position shift register having its input connected to the 4'"'"'s output of said decimal to binary converting means and an 8'"'"'s position shift register having its input connected to the 8'"'"'s output of said decimal to binary converting means, each of said shift registers including at least one stage for each decimal digit of information being inputted, each of said shift registers being adapted to receive a "1" or "0" value from the corresponding binary bit position of the most recently converted decimal digit and each of said shift registers being responsive to said shift pulse indicative of the completion of conversion of the most recently entered decimal digit for shifting the contents of the shift register to the next higher stage so as to enable said shift registers to await the conversion of the next decimal digit of information to be inputted, each of said shift registers having shift register outputs corresponding to each of the stages thereof.

14. The positional display system of claim 13 wherein said temporary storage means further includes a fifth shift register having a signal input connected to a source of potential and a shift input connected to said source of shift pulses, said fifth shift register having one stage for each of said decimal digits of information being inputted, each of said shift register stages having an output therefrom, the output from the last stage of said fifth shift register operating to provide an "entry completed" signal when the last decimal digit of information has been inputted and the last shift pulse has been counted, said converting means further including logical gating means responsive to the receipt of said "entry complete" signal for locking out the inputting of any further decimal digits of information to said converting means until said shift registers are cleared.

15. The positional display system of claim 13 wherein said display system includes a plurality of visual indicator means, one for each decimal digit of information to be entered and a decoder means associated with each of said indicator means, the inputs of each of said decoder means being coupled to the outputs of the stages of each of said shift registers so as to decode each stored binary number and visually display the decimal digit corresponding thereto on said indicator means.

16. The positional display system of claim 13 wherein said temporary storage means includes a first means coupled in parallel with the outputs of those stages of said shift registers storing the row coordinates for receiving the binary number representative thereof in a first sequence of binary digits and a second means coupled in parallel with the outputs of those stages of said shift registers storing the column coordinates for receiving the binary number representative thereof in a second sequence of binary digits so that the first and second sequence of binary digits are arranged in a consecutive serial manner.

17. The positional display system of claim 14 wherein said temporary storage means includes a parallel-in/serial-out register for receiving, in parallel, a sequence of binary numbers indicative of the row and column coordinates of said location and for storing said sequence in a serial array, said temporary storage means including a high speed clock means for generating pulses at a predetermined rate, a counter responsive to the pulses generated by said clock means for counting out a predetermined number of clock pulses equal to the number of binary bits in said sequence stored in said parallel-in/serial-out register, and logic means coupled to the last output of said fifth shift register and responsive to the generating of said "entry completed" signal for initiating the operation of said clock, and means to allow said counter to output said predetermined number of clock pulses, said counter being responsive to the attainment of said predetermined count for terminating the operation of said clock means and means for coupling the predetermined number of clock pulses to said parallel-in/serial out register for serially stepping out the binary bits of said sequence in a serial manner.

18. The positional display system of claim 17 wherein said temporary storage means further includes a serial-in/parallel-out register for receiving said predetermined number of clock pulses and said serial sequence of binary bits for storing said sequence for parallel output so that the first sequence representing said first binary number indicative of the row address of said location is provided at a first set of parallel outputs and the second sequence of binary numbers representative of the column address is provided at a second set of parallel outputs, said first set of parallel outputs corresponding to said first set of outputs of said temporary storage means and being coupled to said first set of comparator inputs of said row comparator whereas said second set of parallel outputs corresponds to said second set of outputs of said temporary storage means and is coupled to said first set of comparator inputs of said column comparator.

19. The positional display system of claim 1 wherein said scanning means includes a master clock for generating clock pulses at a predetermined frequency and a binary up counter having a first 2^m bit binary section having "m" output stages and a second 2ⁿ bit binary section having a "n" output stages the input of said second counter section being coupled to the "m" output stage of the first counter section so that the two counter sections are coupled to count 2^m+n bits, the first set of "m" outputs of said first counter outputting the row scanning pulses, said row scanning outputs being coupled to said first set of said row comparator inputs, to first set of row scanning inputs of said memory means and to the inputs of said row decoder means while said second set of column scanning outputs are coupled to said first set of column comparator inputs, to the second set of column scanning inputs of said memory means and to the inputs of said column decoder means, said memory means being responsive to the scanning of said row and column inputs for outputting signals indicative of the status of illumination of each of the scanned row and column addresses thereof.

20. The positional display system of claim 19 wherein said system further includes a second serial-in/parallel-out register for receiving said predetermined number of clock pulses and the serial sequence of binary numbers and storing same for parallel output therefrom, said second serial-in/parallel-out register having first and second sets of parallel outputs, said system still further including a second row comparator means having first and second sets of inputs and a second row comparator output, said first set of comparator inputs being coupled to said first set of outputs of said second serial-in/parallel-out register which stores the binary number representing of the row address of said entered location and said second set of second row comparator inputs being coupled to said first set of row scanning outputs of said binary up counter, said system further including a second column comparator means having first and second sets of inputs and a comparator output, said first set of column comparator inputs being coupled to said second set of outputs of said serial-in/parallel-out register which stores to the binary number representing the column address of said entered location and said second set of column comparator inputs coupled to said second set of column scanning outputs of said binary up counter, said second row comparator outputting a "row equal" output pulse when equality exists between its first and second sets of inputs and said second column comparator generating a "column equal" output pulse when its first and second sets of inputs are equal, a first logical "AND" gate having one input coupled to the output of said second row comparator and the other input coupled to the output of said second column comparator so that the output of said first "AND" gate is high only if the "row equal" and "column equal" outputs occur simultaneously, said system further including frequency divider means coupled to an output of said binary up counter for generating a sequence of relatively slow clock pulses, a second "AND" gate having one input connected to the output of said frequency divider means and its other input connected to the output of said first "AND" gate, the output of said second "AND" gate supplying a gated strobe pulse, said second serial-in/parallel-out register including a serial input for receiving said serial sequence of binary bits from said parallel-in/serial-out register and a clock input coupled to the output of a third "AND" gate having one input coupled to said source of a predetermined number of clock pulses and its other input coupled to the output from the appropriate stage of an appropriate one of said shift registers so as to output a "blink light" signal when a third value of said command digit which is inputted directs that the light located at said given row and column address is to be alternately blinked on and off so that said second serial-in/parallel-out shift register is only operable when said third value command digit has been entered.

21. The positional display system of claim 1 wherein said row decoder means includes a separate and distinct output for each of the "x" rows of said matrix, said column decoder means includes a separate and distinct output for each of the "y" columns of said matrix, and said logical gating means includes a first set of "x" AND gates each having one input coupled to a corresponding "x" output of said row decoder means and its second input coupled to said source of gated strobe pulses, said logical gating means further including a second set of "x" AND gates each having one input connected to a corresponding output of said first set of "x" AND gates and its second input connected to said memory output so that the output of said second AND gate goes high only when the appropriate row is scanned and the "lights on" command has been entered in the corresponding location of said memory, said logical gating means lastly including a third set of AND gates arranged in "x" rows, each row having "y" gates therein, the output of each of said third set of AND gates being connected to a light input for energizing said light when both gate inputs are high, one input of each of the third AND gates in a given row being connected to the output of a corresponding one of said second set of AND gates and the other input of each of the third AND gates in each column being connected to a corresponding "y" output of said column decoder means so that the light corresponding to each row and column position of said matrix is illuminated only if the command digits inputted dictated a "light on" instruction and an illuminated light is blinked on and off by the operation of said strobe pulse output whenever the command digit inputted so dictates thereby allowing an operator to enter a blinking light command for the location of the occurrence of an incident warranting police protection and a steady "on light" condition for each of the police cars in the area and observe the distance of each of the steady lights from the blinking lights so as to enable the operator to dispatch the nearest police car to the scene of the incident thereby aiding in making command and control decisions.

22. A positional location display system for visually displaying the position of a vehicle such as a police car on a map matrix comprising:

means for generating input signals representing "d" decimal digits of information relating to at least the positional coordinates of a motor vehicle such as a police car and a command instruction directing "light on" and "light off" status conditions;

priority encoding means for receiving said input signals representing said decimal digits of information and for sequentially encoding said input signals one digit at a time into binary coded decimal form, said priority encoding means producing a 1'"'"'s, 2'"'"'s, 4'"'"'s and 8'"'"'s binary bit respectfully for each decimal digit as it is encoded, said priority encoder means further including delay means responsive to the completion of encoding of each of said decimal digits for generating a shift pulse;

shift register means including a 1'"'"'s position shift register for receiving and storing the units bit of each binary encoded digit of information entered into said priority encoding means, a 2'"'"'s position shift register for receiving and storing the 2'"'"'s bit of each binary encoded digit of information entered into said priority encoding means, a 4'"'"'s position shift register for receiving and storing the 4'"'"'s bit of each binary encoded digit of information entered into said priority encoding means, and an 8'"'"'s position shift register for receiving and storing the 8'"'"'s bit for each binary encoded digit of information entered into said priority encoding means, each of said shift registers having a separate stage and output for each of said "d" digits of information to be entered, each of said shift registers being coupled to said shift pulse-generating means and being responsive to the generation of a shift pulse indicative of the completed entry of a digit of information for shifting the stored contents of each of the "d" stages thereof to the next higher stage to enable said shift register to receive the binary representation of the next sequentially encoded digit of information, said shift register means further including a first counting means coupled to said shift pulse generating means for counting said shift pulses and generating a "last count" signal when "d" digits of information have been entered and "d" shift pulses counted;

first means coupled to the outputs of those shift register stages which ultimately store information for defining the "x" coordinates of positional location of said vehicle for generating a first "m" bit binary number representative of said "x" coordinate;

second means coupled to the outputs of those shift register stages which ultimately store information for defining the "y" coordinates of positional location of said vehicle for generating a second "n" bit binary number representative of said "y" coordinate;

third means coupled to the outputs of those shift register stages which ultimately store information for defining said command instruction for outputting "light on" and "light off" status condition commands;

a parallel-in/serial-out register coupled to the said first and second means for receiving in parallel an m+n bit sequence of binary bits representing the "x" and "y" coordinates of said vehicle and for serially outputting said m+n bit data sequence upon command;

clock means responsive to the generation of said "last count" signal for generating clock pulses at a predetermined rate;

a second counter means coupled to said clock means and said parallel-in/serial-out means for counting out exactly m+n of said clock pulses before disabling said clock means and outputting a "termination flag" pulse indicating that said m+n pulses have been counted, said parallel-in/serial-out register means being responsive to said m+n counted clock pulses for shifting out said m+n binary bits of stored data in response thereto;

serial-in/parallel-out means coupled to said clock means and said parallel-in/serial-out register means for serially receiving said m+n bit sequence of binary bits, said serial-in/parallel-out means including a set of "m" row outputs of outputting in parallel the first "m" binary bits of received data representative of the "x" coordinates of said vehicle and further including a set of "n" column outputs for outputting in parallel the next "n" binary bits of received data representative of the "y" coordinates of said vehicle;

a relatively high speed master clock for generating master clock pulses at a predetermined rate;

a 2^m+n binary up counter for counting said master clock pulses, said binary up counter having a first set of "m" row counter outputs and a second set of "n" column counter outputs, said first set of "m" row counter outputs corresponding to the first "m" consecutive lower ordered binary places while said second set of "n" column counter outputs correspond to the next higher ordered "n" consecutive binary places of said count;

row comparator means having a first set of "m" inputs coupled to the "m" outputs of said serial-in/parallel-out means and a second set of "m" inputs coupled to said first set of "m" row counter outputs of said binary up counter for comparing the binary number representation of the "x" coordinate which is stored on said "m" row outputs with the changing binary count on said "m" row counter outputs and for outputting a "row match" signal when equality exists;

column comparator means having a first set of "n" inputs coupled to the "n" column outputs of said serial-in/parallel-out means and a second set of "n" inputs coupled to said second set of "n" column counter outputs of said binary up counter for comparing the binary number representing the "y" coordinate which is stored on said "n" column outputs with the changing binary count on said "n" column counter outputs and for outputting a "column match" signal when equality exists;

gating means responsive to the generation of said "row match" signal, said "column match" signal and said "termination flag" signal for generating a "write command" signal;

a random access memory coupled to the row and column counter outputs of said binary up counter for sequentially scanning the row and column address locations thereof, said random access memory including an input for receiving said "lights on" and "lights off" command instruction and further including an input responsive to the generation of said "write command" signal for enabling said random access memory to write said command instruction into the address location then being scanned by said row and column counter outputs and further including output means for reading out the stored "lights on" or "lights off" command whenever said address location is scanned by said row and column counter outputs;

a matrix display of lighting means overlaid with a map representing the geographical area of concern to the user of the system, said matrix display having "a" rows of lighting means, each of said rows having "b" individual lighting means therein; and

logic means responsive to said row and column counter outputs and to said random access memory output means for selectively lighting or not lighting the particular individual light means of the matrix display corresponding to the actual positional location of the vehicle which was previously entered into the system to provide a visual indication of the position of the vehicle for dispatch and control purposes.