Early flood warning system

• US 4,153,881 A
• Filed: 04/28/1978
• Issued: 05/08/1979
• Est. Priority Date: 10/31/1977
• Status: Expired due to Term

• Current Assignee: Alan R. Permut, Albert A. Permut, Ronald M. Permut
• Original Assignee: Alan R. Permut, Albert A. Permut, Ronald M. Permut
• Inventors: Permut, Ronald M., Permut, Alan R., Permut, Albert A.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Coles, Edward L.
• Application Number:
  US05/900,906
• Time in Patent Office: 375 Days
• Field of Search: 340/539, 340/601, 340/612, 340/616, 340/619, 340/620, 340/201 R, 73/171, 73/290, 73/304, 235/92 FL, 325/51, 325/54, 325/64, 325/466
• US Class Current: 375/242
• CPC Class Codes: G08B 19/00 Alarms responsive to two or more different undesired or abnormal conditions, e.g. burglary and fire, abnormal temperature and abnormal rate of flow
• CPC Class Codes: G08B 27/00 Alarm systems in which the alarm condition is signalled from a central station to a plurality of substations

Abstract

An Early Flood Warning System provides advanced warning of probable flash floods and/or stage floods to potential flood victims by collecting and analyzing rainfall and stream level data, and by providing means for disseminating alarms and instructions to individuals in threatened areas. Said Early Flood Warning System contains: a plurality of automated electronic digital liquid level gauges, some of which are specially adapted as rain gauges, and some of which are specially adapted as stream level gauges; a plurality of gauge actuated transmitters; a receiver; a decoder and validity logic unit; a data analysis unit; a central disaster alert station; and a plurality of disaster alert modules. Said digital liquid level gauges are energy and environmental intensive devices which electronically measure, using digital techniques, liquid levels such as rainfall and stream level, and transmit data by coded radio frequency (R.F.) signals to a central data analysis facility. Said digital liquid level gauges are remotely located and independent of each other.

Claims

1. An early flood warning system comprising:

a digital liquid level gauge for measuring the level of liquid in discrete increments at desired locations;

a plurality of level sensing electrodes in said digital liquid level gauge for providing possible electric current paths in conjunction with the current carrying capability of somewhat electrically conductive liquid in contact with said level sensing electrodes;

a means for mounting said level sensing electrodes in a spaced relationship to each other, and in a desired relationship to the liquid whose level is being measured;

a means for applying a voltage to said level sensing electrodes via liquid in contact with said level sensing electrodes and said voltage applying means;

an n-bit level encoder connected to said level sensing electrodes for detecting which of said level sensing electrodes are in contact with said liquid whose level is being measured, and for generating a digital output which uniquely defines the uppermost of said level sensing electrodes in contact with said liquid;

a first latch connected to said level encoder for storing the digital output of said level encoder, and for providing a digital output of the stored value;

a first comparator connected to said level encoder and to said first latch for comparing the digital output of said level encoder and the digital output of said first latch, and for generating a first pulse whenever and for the duration that the digital output of said level encoder and the digital output of said first latch are unequal;

a timing control whose input is connected to said first comparator output and whose output is connected to said first latch, for detecting if said first pulse persists for a selectable minimum time, and for providing a second pulse to said first latch whenever said first pulse does persist for said selectable minimum time, said second pulse when applied to said first latch causes said first latch to store the digital output of said level encoder;

a parallel to serial converter connected to said first latch output for converting the parallel output of said first latch to a serial pulse coded sequence of repeating code frames, each code frame consisting of a train of pulses and each code frame uniquely defining the parallel output of said first latch;

a transmitter connected to said parallel to serial converter for transmitting a first coded R.F. signal by R.F. carrier, representing said serial pulse coded sequence;

a transmitter activation switch connected to the output of said timing control, to said parallel to serial converter, and to said transmitter for activating said parallel to serial converter and said transmitter for a selectable time whenever said second pulse occurs;

a receiver for receiving said first coded R.F. signals and for producing a serial pulse coded signal which represents said first coded R.F. signal;

a short pulse detector connected to said receiver for producing a third pulse whenever said serial pulse coded signal contains a pulse of a selectable minimum duration;

a long pulse detector connected to said receiver for producing a fourth pulse whenever said serial pulse coded signal contains a pulse of a selectable duration longer than that detected by said short pulse detector;

a sync pause detector connected to said receiver for producing a fifth pulse whenever the time following a pulse in said serial pulse coded signal exceeds a selectable maximum time;

a serial to parallel converter connected to said short pulse detector and to said long pulse detector for converting the output of said short pulse detector and the output of said long pulse detector, said third and fourth pulses respectively, to a parallel digital output which uniquely represents said serial pulse coded signal;

a second latch connected to said serial to parallel converter for storing the output of said serial to parallel converter, and for providing a digital output of the stored value;

a second comparator connected to said serial to parallel converter and to said second latch, for comparing the digital output of said serial to parallel converter and the digital output of said second latch, and for producing a sixth pulse whenever said digital output of said serial to parallel converter and the digital output of said second latch are equal;

a first logic gate connected to said sync pause detector, to said second comparator, and to said second latch for determining when said fifth pulse occurs in the absence of said sixth pulse, and for then producing a seventh pulse, which triggers said second latch to store the digital output of said serial to parallel converter;

a second logic gate connected to said sync pause detector, and to said second comparator, for producing an eighth pule when said fifth pulse and said sixth pulse occur simultaneously;

a counter connected to said second logic gate for counting the number of said sixth pulses, and for producing a tenth pulse when said counter reaches a selectable minimum count;

a time limit control connected to said second logic gate and to said counter for producing a ninth pulse if a minimum selectable time elapses between the occurences of said eigth pulses, said ninth pulse resetting said counter; and

a data buffer connected to said second latch and to said counter for storing the digital output of said second latch when said tenth pulse occurs, and for providing a digital output of the stored value.

2. The arrangement as recited in claim 1 further comprising a timer, connected to said transmitter activation switch, for periodically energizing said transmitter activation switch.

3. The arrangement as recited in claim 1 wherein said parallel to serial converter has gauge identity fixed inputs applied, and thereby converts the parallel output of said first latch and the gauge identity fixed inputs to a serial pulse coded sequence of repeating code frames, each code frame consisting of a train of pulses and each code frame uniquely defining the parallel output of said first latch in combination with the gauge identity fixed inputs.

4. The arrangement as recited in claim 1 wherein said digital liquid level gauge is specially adapted for measuring the water in a water conveying channel, and wherein said means for mounting said level sensing electrodes is rigid and is located in a desired spatial relationship to the water in the water conveying channel.

5. The arrangement as recited in claim 4 further comprising a timer connected to said transmitter activation switch for periodically energizing said transmitter activation switch.

6. The arrangement as recited in claim 1 wherein said digital liquid level gauge is specially adapted for measuring atmospheric precipitation, and further comprises:

a collecting vessel for collecting atmospheric precipitation;

a level sensing column contigous with said collecting vessel and partially composed of said means for mounting said level sensing electrodes, for accumulating atmospheric precipitation collected by said collecting vessel;

an emptying valve appended to the lower end of said level sensing column for rapidly draining the atmospheric precipitation therefrom; and

an emptying valve control connected to said emptying valve, and to the uppermost of said level sensing electrodes, for operating said emptying valve whenever atmospheric precipitation fills said level sensing column to its measuring capacity.

7. The arrangement as recited in claim 6 further comprising a timer connected to said transmitter activation switch and to said emptying valve control for periodically energizing said transmitter activation switch and said emptying valve control.

8. The arrangement as recited in claim 6 further comprising a heat source in close proximity to said collecting vessel and said level sensing column for providing necessary heat to convert collected atmospheric precipitation in the frozen state to a liquid state, and to maintain collected and accumulated atmospheric precipitation in the liquid state.

9. A digital liquid level gauge comprising:

a plurality of level sensing electrodes for providing possible current carrying paths in conjunction with the current carrying capability of somewhat electrically conductive liquid in contact with said level sensing electrodes;

a means for mounting said level sensing electrodes in a spaced relationship to each other, and in a desired relationship to the liquid whose level is being measured;

a means for applying a voltage to said level sensing electrodes via liquid in contact with said level sensing electrodes and said voltage applying means;

an n-bit level encoder connected to said level sensing electrodes for detecting which of said level sensing electrodes are in contact with said liquid whose level is being measured, and for generating a digital output which uniquely defines the uppermost of said level sensing electrodes in contact with said liquid;

a first latch connected to said level encoder for storing the digital output of said level encoder, and for providing a digital output of the stored value;

a first comparator connected to said level encoder and to said first latch for comparing the digital output of said level encoder and the digital output of said first latch, and for generating a first pulse whenever and for the duration that the digital output of said level encoder and the digital output of said first latch are unequal; and

a timing control whose input is connected to said first comparator output and whose output is connected to said first latch, for detecting if said first pulse persists for a selectable minimum time, and for providing a second pulse to said first latch whenever said first pulse does persist for said selectable minimum time, said second pulse when applied to said first latch causes said first latch to store the digital output of said level encoder.

10. The arrangement as recited in claim 9 further comprising a display means connected to said first latch, for displaying the measured liquid level as represented by the digital output of said first latch.

11. The arrangement as recited in claim 9 further comprising:

a transmitter connected to said latch for transmitting first coded R.F. signals representing the digital output of said first latch whenever said transmitter is activated; and

a transmitter activation switch connected to said timing control and to said transmitter, for activating said transmitter for a selectable time whenever said first pulse occurs.

12. The arrangement as recited in claim 11 further comprising a timer connected to said transmitter activation switch, for periodically energizing said transmitter activation switch.

13. The arrangement as recited in claim 9 wherein said digital liquid level gauge is specially adapted for measuring the water in a water conveying channel, and wherein said means for mounting said level sensing electrodes is rigid and is located in a desired spatial relationship to the water in the water conveying channel.

14. The arrangement as recited in claim 13 further comprising a display means connected to said first latch, for displaying the measured liquid level as represented by the digital output of said first latch.

15. The arrangement as recited in claim 13 further comprising:

a transmitter connected to said latch for transmitting first coded R.F. signals representing the digital output of said first latch whenever said transmitter is activated; and

a transmitter activation switch connected to said timing control and to said transmitter, for activating said transmitter for a selectable time whenever said first pulse occurs.

16. The arrangement as recited in claim 15 further comprising a timer connected to said transmitter activation switch, for periodically energizing said transmitter activation switch.

17. The arrangement as recited in claim 9 wherein said digital liquid level gauge is specially adapted for measuring atmospheric precipitation, and further comprises:

a collecting vessel for collecting atmospheric precipitation;

a level sensing column contiguous with said collecting vessel and partially composed of said means for mounting said level sensing electrodes, for accumulating atmospheric precipitation collected by said collecting vessel;

an emptying valve appended to the lower end of said level sensing column for rapidly draining the atmospheric precipitation therefrom; and

an emptying valve control connected to said emptying valve, and to the uppermost of said level sensing electrodes, for operating said emptying valve whenever atmospheric precipitation fills said level sensing column to its measuring capacity.

18. The arrangement as recited in claim 17 further comprising a heat source in close proximity to said collecting vessel and said level sensing column for providing necessary heat to convert collected atmospheric precipitation in the frozen state to a liquid state, and to maintain collected and accumulated atmospheric precipitation in the liquid state.

19. The arrangement as recited in claim 17 further comprising a display means connected to said first latch, for displaying the measured liquid level as represented by the digital output of said first latch.

20. The arrangement as recited in claim 17 further comprising:

a transmitter connected to said latch for transmitting first coded R.F. signals representing the digital output of said first latch whenever said transmitter is activated; and

a transmitter activation switch connected to said timing control and to said transmitter, for activating said transmitter for a selectable time whenever said first pulse occurs.

21. The arrangement as recited in claim 20 further comprising a timer connected to said transmitter activation switch, for periodically energizing said transmitter activation switch.

22. A decoder and validity logic unit for decoding and validating a serial pulse coded signal, comprising:

a short pulse detector to which said serial pulse coded signal is applied, for producing a third pulse whenever said serial pulse coded signal contains a pulse of a selectable minimum duration;

a long pulse detector to which said serial pulse coded signal is applied, for producing a fourth pulse whenever said serial pulse coded signal contains a pulse of a selectable duration longer than that detected by said short pulse detector;

a sync pause detector to which said serial pulse coded signal is applied, for producing a fifth pulse whenever the time following a pulse in said serial pulse coded signal exceeds a selectable maximum time;

a serial to parallel converter connected to said short pulse detector and to said long pulse detector, for converting the output of said short pulse detector and the output of said long pulse detector, said third and fourth pulses respectively, to a parallel digital output which uniquely represents said serial pulse coded signal;

a second latch connected to said serial to parallel converter for storing the output of said serial to parallel converter, and for providing a digital output of the stored value;

a second comparator connected to said serial to parallel converter and to said second latch, for comparing the digital output of said serial to parallel converter and the digital output of said second latch, and for producing a sixth pulse whenever said digital output of said serial to parallel converter and the digital output of said second latch are equal;

a first logic gate connected to said sync pause detector, to said second comparator, and to said second latch for determining when said fifth pulse occurs in the absence of said sixth pulse, and for then producing a seventh pulse, which triggers said second latch to store the digital output of said serial to parallel converter;

a second logic gate connected to said sync pause detector, and to said second comparator, for producing an eigth pulse when said fifth pulse and said sixth pulse occur simultaneously;

a counter connected to said second logic gate for counting the number of said sixth pulses, and for producing a tenth pulse when said counter reaches a selectable minimum count;

a time limit control connected to said second logic gate and to said counter for producing a ninth pulse if a minimum selectable time elapses between the occurences of said eigth pulses, said ninth pulse resetting said counter.

23. The arrangement recited in claim 22 further comprising a data buffer connected to said second latch and to said counter for storing the digital output of said second latch when said tenth pulse occurs, and for providing a digital output of the stored value.

24. A decoder and validity logic unit for decoding and validating a serial pulse coded signal, comprising:

a short pulse detector to which said serial pulse coded signal is applied, for producing a third pulse whenever said serial pulse coded signal contains a pulse of a selectable minimum duration;

a long pulse detector to which said serial pulse coded signal is applied, for producing a fourth pulse whenever said serial pulse coded signal contains a pulse of a selectable duration longer than that detected by said short pulse detector;

a sync pause detector to which said serial pulse coded signal is applied, for producing a fifth pulse whenever the time following a pulse in said serial pulse coded signal exceeds a selectable maximum time;

a serial to parallel converter connected to said short pulse detector and to said long pulse detector, for converting the output of said short pulse detector and the output of said long pulse detector, said third and fourth pulses respectively, to a parallel digital output which uniquely represents said serial pulse coded signal;

a second latch connected to said serial to parallel converter for storing the output of said serial to parallel converter, and for providing a digital output of the stored value;

a second comparator connected to said serial to parallel converter, to said second latch, and to which fixed digital values are applied, for producing a sixth pulse whenever the digital output of said serial to parallel converter is equal to the combination of said digital output of said second latch and the applied fixed digital values;

a first logic gate connected to said sync pause detector, to said second comparator, and to said second latch for determining when said fifth pulse occurs in the absence of said sixth pulse, and for then producing a seventh pulse, which triggers said second latch to store the digital output of said serial to parallel converter;

a second logic gate connected to said sync pause detector, and to said second comparator, for producing an eigth pulse when said fifth pulse and said sixth pulse occur simultaneously;

a counter connected to said second logic gate for counting the number of said sixth pulses, and for producting a tenth pulse when said counter reaches a selectable minimum count;

a time limit control connected to said second logic gate and to said counter for producing a ninth pulse if a minimum selectable time elapses between the occurences of said eigth pulses, said ninth pulse resetting said counter.