Solid state data recorder

• US 4,156,286 A
• Filed: 11/16/1977
• Issued: 05/22/1979
• Est. Priority Date: 11/16/1977
• Status: Expired due to Term

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Connors, John P., Bell, Henry P.
• Primary Examiner(s): Fears, Terrell W.
• Application Number:
  US05/852,186
• Time in Patent Office: 552 Days
• Field of Search: 365/45, 365/73, 365/76, 365/77
• US Class Current: 365/45
• CPC Class Codes: G07C 5/085 using electronic data carriers
• CPC Class Codes: G11C 11/414 for memory cells of the bipolar type
• CPC Class Codes: G11C 19/00 Digital stores in which the information is moved stepwise, e.g. shift registers
• CPC Class Codes: G11C 2207/16 Solid state audio deprecated, only for historical reasons, G06F3/16, G11B
• CPC Class Codes: G11C 7/16 Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters

Abstract

A solid state data recording system for storing multichannel analog data. is low power system has characteristics similar to a high performance analog tape recorder but has no moving parts and can be easily ruggedized for severe environmental conditions. In the "write" mode analog data are sampled and converted to digital bits of information. These individual bits are stored in a solid state storage medium by coded enabling and address information provided by a controller. The information is played back by reading out these digital bits, converting them to analog form, and then demultiplexing them to their original channels.

Claims

1. A multichannel analog data recording system comprising:

means for sequentially sampling each channel of input data to said recording system;

means coupled to the output of said sampling means for converting each of said samples of data into multi-bit digital format;

a solid state memory coupled to the output of said digital conversion means;

means for controlling the storage sequence of said multibit digital format data into said solid state memory;

means for controlling the readout sequence of said multibit digital format data from said solid state memory;

means for converting said digital format data readout from said solid state memory into analog form; and

means for demultiplexing said analog signals into various channels of data corresponding to the channels of input data to said recording system.

2. The solid state data recording system of claim 1 wherein said solid state memory includes an array of CMOS devices.

3. The system of claim 1 wherein said solid state memory includes an array of programmable read only memory devices.

4. The system of claim 1 wherein said solid state memory includes an array of charge coupled devices.

5. The system of claim 1 wherein said solid state memory includes an array of magnetic bubbles.

6. A multichannel analog data recording system comprising:

a multiplexer for sequentially sampling analog input data to said recording system;

an analog to digital converter coupled to the output of said multiplexer for converting said sampled analog data into discrete bits of multiple-bit digital information;

a solid state storage medium coupled to the output of said analog to digital converter for the storage of said discrete bits of digital data;

a digital to analog converter coupled to the output of said solid state storage medium for converting said discrete bits of digital data into analog signals;

a demultiplexer coupled to the output of said digital to analog converter having a plurality of outputs, one for each channel, for assigning serial data from said converter to its appropriate channel; and

means for controlling the timing and sequence of said multiplexer, analog to digital converter, solid state storage medium, digital to analog converter, and demultiplexer.

7. The system of claim 6 wherein said solid state storage medium is an array of CMOS devices.

8. The system of claim 6 wherein said solid state storage medium includes an array of programmable read only memories.

9. The system of claim 6 wherein said solid solid state storage medium includes an array of charged coupled devices.

10. The system of claim 6 wherein said solid state storage medium includes an array of magnetic bubble devices.